Abstract: One or more examples relate to methods and apparatuses for measuring a voltage node. An example method may include providing, between an input of a measurement circuit and a voltage node associated with a higher voltage domain than the measurement circuit, a circuit including decoupled capacitors, the decoupled capacitors including at least a first capacitor and a second capacitor; generating, by the measurement circuit, a first digital value representing a voltage level related to a voltage level at the voltage node at least partially responsive to performing a measurement process utilizing the circuit; and generating, by a processor, a second digital value representing the voltage level at the voltage node at least partially responsive to the first digital value and a scaling factor, the scaling factor representing a pre-specified relationship between the voltage level represented by the first digital value and the voltage level at the voltage node.

Abstract: Aspects relate to techniques for efficient sidelink resource reservation based on the congestion on a sidelink. A wireless communication device may transmit control information indicating a number of resources reserved for an initial transmission and at least one retransmission of a packet. In some examples, the number of resources included in the control information can be either three resources or two resources based on the congestion. For example, the number of resources included in the control information can be three resources in response to a congestion value representing the congestion on the sidelink being less than a threshold. In addition, the number of resources included in the control information can be two resources in response to the congestion value being greater than or equal to the threshold.

Abstract: One or more embodiments relate to a multi-bias mode current conveyor. Such a current conveyor may include an input terminal, a reference terminal, an output terminal, a first and second cascoded current mirrors, and a biasing circuit. The first cascoded current mirror and a second cascoded current mirror may be arranged as a current conveyor that is configured to provide an output current that a mirror of an input current. The biasing circuit may be configured to provide a bias voltage selectively exhibiting a first voltage level or a second voltage level. The bias voltage may be provided at least partially responsive to a state of the input current. The biasing circuit may be arranged to apply the bias voltage to at least one of the first cascoded current mirror or the second cascoded current mirror.

Abstract: An imaging system includes a pixel array with pixel circuits, each including a photodiode, a floating diffusion, a source follower transistor, and a row select transistor. The imaging system further includes rolling clamp (RC) drivers, each coupled to a gate terminal of a row select transistor of one of the pixel circuits and each including first and second PMOS transistors coupled between a clamp voltage and the gate terminal of the row select transistor of the one of the pixel circuits, and first, second, and third NMOS transistors coupled between the clamp voltage and the gate terminal of the row select transistor of the one of the pixel circuits. The PMOS transistors and the NMOS transistors are coupled in parallel. The PMOS transistors are configured to provide an upper clamp voltage range, and the NMOS transistors are configured to provide a lower clamp voltage range.

Abstract: Described herein are compositions and methods for a novel drug delivery platform using affinity homing. Also disclosed herein are a drug delivery system, methods for using the novel drug delivery platform and a kit.

Abstract: One or more examples relate to inverting current amplification and related touch systems. An apparatus includes a first transistor, a second transistor, and a feedback loop. The first transistor and the second transistor provide controlled current at the second transistor that is a copy of current at the first transistor when respective drain-source voltages of the first transistor and the second transistor are substantially equal. The feedback loop sets respective drain-source voltages of the first transistor and the second transistor to be substantially equal, wherein a responsiveness of the feedback loop is proportional to a set transconductance of the feedback loop.

Abstract: One or more examples relate to voltage level shifting. An example apparatus may include first and second inputs, an output, and a circuit. The first and second inputs may receive compliments of a signal represented by first voltage levels. The output may provide the signal represented by second voltage levels. The circuit may change voltage levels utilized to represent the signal from first voltage levels to second voltage levels. The circuit may include cross-coupled first high voltage switches, a pair of series coupled switches, and a pair of voltage clamping switches. The cross-coupled first high voltage switches may selectively couple the output to a high voltage node responsive to a high voltage level of the signal. The pair of series coupled switches may comprising respective second high voltage switches, and the pair of series coupled switches may selectively couple the output to a first voltage supply.

Abstract: A charge pump cell for a charge pump is disclosed that may exhibit improved latch-up immunity. A circuit may be arranged at the charge pump cell to apply a voltage to a bulk contact of a charge transfer transistor of such a charge pump cell at least partially responsive to a relationship between a voltage at a first terminal of the charge transfer transistor and a voltage at a second terminal of the charge transfer transistor. A charge pump including one or more such charge pump cells may include a control loop that is configured to control a pumping signal at least partially responsive to a state of an output voltage of the charge pump.

Abstract: A charge compensation circuit is disclosed that provides amplified charge cancellation. A touch controller is disclosed that includes such a charge compensation circuit and may realize improved immunity to baseline capacitance signals that are much larger than a change in capacitance due to proximity of an object. Such a charge compensation circuit may include a capacitor, a driver circuit arranged to apply a pulsed voltage signal to the capacitor, and a current conveyor having a programmable gain and arranged to amplify an initial charge generated by the capacitor in response to the pulsed voltage signal and provide an amplified charge to an output of the charge cancellation circuit.

Abstract: A charge pump cell for a charge pump is disclosed that may exhibit improved latch-up immunity. A circuit may be arranged at the charge pump cell to apply a voltage to a bulk contact of a charge transfer transistor of such a charge pump cell at least partially responsive to a relationship between a voltage at a first terminal of the charge transfer transistor and a voltage at a second terminal of the charge transfer transistor. A charge pump including one or more such charge pump cells may include a control loop that is configured to control a pumping signal at least partially responsive to a state of an output voltage of the charge pump.

Abstract: A charge pump having an input section, and first and second output charge pump sections. The input section includes an input and output node and N input charge pump cells arranged between the input and output nodes. The first output charge pump section includes a first input and output node and M first charge pump cells arranged between the first input and output nodes. The second output charge pump section includes a second input and output node and K second charge pump cells arranged between the second input and output nodes (M, N, K: any integer?1). The output node of the input charge pump section is coupled with the first input node of the first output charge pump section and with the second input node of the second output charge pump section. The charge pump is configured to provide a first output voltage on the first output node and a second output voltage on the second output node.

Abstract: One or more examples relate to methods and apparatuses for measuring a voltage node. An example method may include providing, between an input of a measurement circuit and a voltage node associated with a higher voltage domain than the measurement circuit, a circuit including decoupled capacitors, the decoupled capacitors including at least a first capacitor and a second capacitor; generating, by the measurement circuit, a first digital value representing a voltage level related to a voltage level at the voltage node at least partially responsive to performing a measurement process utilizing the circuit; and generating, by a processor, a second digital value representing the voltage level at the voltage node at least partially responsive to the first digital value and a scaling factor, the scaling factor representing a pre-specified relationship between the voltage level represented by the first digital value and the voltage level at the voltage node.

Abstract: One or more embodiments relate to a multi-bias mode current conveyor. Such a current conveyor may include an input terminal, a reference terminal, an output terminal, a first and second cascoded current mirrors, and a biasing circuit. The first cascoded current mirror and a second cascoded current mirror may be arranged as a current conveyor that is configured to provide an output current that a mirror of an input current. The biasing circuit may be configured to provide a bias voltage selectively exhibiting a first voltage level or a second voltage level. The bias voltage may be provided at least partially responsive to a state of the input current. The biasing circuit may be arranged to apply the bias voltage to at least one of the first cascoded current mirror or the second cascoded current mirror.

Abstract: A charge pump cell for a charge pump is disclosed that may exhibit improved latch-up immunity. A circuit may be arranged at the charge pump cell to apply a voltage to a bulk contact of a charge transfer transistor of such a charge pump cell at least partially responsive to a relationship between a voltage at a first terminal of the charge transfer transistor and a voltage at a second terminal of the charge transfer transistor. A charge pump including one or more such charge pump cells may include a control loop that is configured to control a pumping signal at least partially responsive to a state of an output voltage of the charge pump.

Abstract: A MEMS microphone integrates a temperature-sensing element in or on the ASIC die of a MEMS microphone to enable an audio mode and a temperature-sensing mode in parallel. The system also permits for a method for easily switching between these two modes and for outputting both digital output signals at the same common output pad, which allows for the use of the footprint of a conventional microphone.

Abstract: A charge compensation circuit is disclosed that provides amplified charge cancellation. A touch controller is disclosed that includes such a charge compensation circuit and may realize improved immunity to baseline capacitance signals that are much larger than a change in capacitance due to proximity of an object. Such a charge compensation circuit may include a capacitor, a driver circuit arranged to apply a pulsed voltage signal to the capacitor, and a current conveyor having a programmable gain and arranged to amplify an initial charge generated by the capacitor in response to the pulsed voltage signal and provide an amplified charge to an output of the charge cancellation circuit.

Abstract: Described herein are compositions and methods for a novel drug delivery platform using affinity homing. Also disclosed herein are a drug delivery system, methods for using the novel drug delivery platform and a kit.

Abstract: It is proposed to integrate a temperature-sensing element in or on the ASIC die of a MEMS microphone to enable an audio mode and a temperature-sensing mode in parallel. A method for easily switching between these two modes and for outputting both digital output signals at the same common output pad is given allowing to use the footprint of a conventional microphone.

Abstract: In an embodiment an oscillator device includes a ring oscillator circuit with at least one delay stage with an output of a last delay stage fed back to an input of a first delay stage, wherein each of the delay stages is configured to receive a charging current and to provide a delay that is dependent on the charging current and at least one of the delay stages includes a metal-oxide-semiconductor field-effect transistor and a bias circuit including an output terminal coupled to an input terminal of the ring oscillator circuit, wherein the bias circuit is configured to receive a temperature-independent reference voltage and includes a current source with a main NMOS-transistor, the current source configured to provide a control current to the ring oscillator circuit which is proportional to a difference of the temperature-independent reference voltage and a gate-source voltage of the main NMOS-transistor, and wherein the gate-source voltage of the main NMOS-transistor includes a negative temperature coefficie

Abstract: A bandgap reference circuit and a method for providing a reference voltage are disclosed. In an embodiment a bandgap reference circuit includes a voltage generator including a first branch and a second branch and being configured to produce a reference voltage with a temperature coefficient lower than a given threshold, a supply circuit configured to provide a first current to the first branch and a second current to the second branch, and a control loop including a transconductance amplifier configured to provide an output signal representative of a difference between a first voltage of the first branch and a second voltage of the second branch and a filter coupled to an output of the transconductance amplifier, the filter configured to provide an output signal for controlling the first current and second current of the supply circuit.