Abstract: A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.

Abstract: A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.

Abstract: A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.

Abstract: A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.

Abstract: A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.

Abstract: A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.

Abstract: A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.

Abstract: A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.

Abstract: A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.

Abstract: A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.

Abstract: A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.

Abstract: A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.

Abstract: A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.

Abstract: EMI emission is reduced by jittering the switching frequency of a switched mode power supply. An oscillator with a control input for varying the oscillator's switching frequency generates a jittered clock signal. In one embodiment, the oscillator is connected to a counter clocked by the oscillator. The counter drives a digital to analog converter, whose output is connected to the control input of the oscillator for varying the oscillation frequency. In another embodiment, the oscillator is connected to a low frequency oscillator whose low frequency output is used to supplement the output of the oscillator for jittering the switching frequency. The invention thus deviates or jitters the switching frequency of the switched mode power supply oscillator within a narrow range to reduce EMI noise by spreading the energy over a wider frequency range than the bandwidth measured by the EMI test equipment.

Abstract: A pulse width modulated switch comprises a first terminal, a second terminal, and a switch that allows a signal to be transmitted between the first terminal and the second terminal according to a drive signal provided at a control input. The pulse width modulated switch also comprises a frequency variation circuit that provides a frequency variation signal and an oscillator that provides an oscillation signal having a frequency of that varies within a frequency range according to the frequency variation signal. The oscillator further provides a maximum duty cycle signal comprising a first state and a second state. The pulse width modulated switch further comprises a drive circuit that provides the drive signal when the maximum duty cycle signal is in the first state and a magnitude of the oscillation signal is below a variable threshold level.

Abstract: A switched mode controller for properly handling an under-voltage condition in a power line which includes a current mirror for receiving current from the power line; a reference current source coupled to the current mirror for supplying a reference current; and a power transistor coupled to the reference current source, the power transistor generating a pulse width modulated signal when current from the power line exceeds the reference current, the power transistor being disabled when current from the power line is less than the reference current.

Abstract: A pulse width modulated switch comprises a first terminal, a second terminal, and a switch that allows a signal to be transmitted between the first terminal and the second terminal according to a drive signal provided at a control input. The pulse width modulated switch also comprises a frequency variation circuit that provides a frequency variation signal and an oscillator that provides an oscillation signal having a frequency of that varies within a frequency range according to the frequency variation signal. The oscillator further provides a maximum duty cycle signal comprising a first state and a second state. The pulse width modulated switch further comprises a drive circuit that provides the drive signal when the maximum duty cycle signal is in the first state and a magnitude of the oscillation signal is below a variable threshold level.