Abstract: Dynamic interrupt steering remaps the handling of interrupts away from processor units executing important workloads. During the operation of a computing system, important workload utilization rates for processor units handling interrupts are determined and those processor units with utilization rates about a threshold value are made unavailable for handling interrupts. Interrupts are dynamically remapped to processor units available for interrupt handling based on processor unit idle state and, in the case of heterogeneous computing systems, processor unit type. Processor units are capable of idle state demotion by, in response to receiving a request to enter into a deep idle state, determining if its interrupt handling rate is greater than a threshold value, and if so, placing itself into a shallower idle state than requested. This avoids the computing system from incurring the expensive idle state exit latency and power costs associated with exiting from a deep idle state.

Abstract: An apparatus, method, and machine-readable medium for performing masked occlusion culling. For example, one embodiment of an apparatus comprises: incremental scene rendering circuitry/logic to incrementally render a first portion of a scene in a first buffer and a second portion of a scene in a second buffer; buffer merging circuitry/logic to merge the first portion of the scene and the second portion of the scene to generate merged scene data; and masked occlusion culling (MOC) circuitry/logic, responsive to a mask value in an occlusion query (OQ) mask buffer, to perform depth testing and occlusion culling operations on the merged scene data.

Abstract: An apparatus, method, and machine-readable medium for performing masked occlusion culling. For example, one embodiment of an apparatus comprises: incremental scene rendering circuitry/logic to incrementally render a first portion of a scene in a first buffer and a second portion of a scene in a second buffer; buffer merging circuitry/logic to merge the first portion of the scene and the second portion of the scene to generate merged scene data; and masked occlusion culling (MOC) circuitry/logic, responsive to a mask value in an occlusion query (OQ) mask buffer, to perform depth testing and occlusion culling operations on the merged scene data.