Patents by Inventor Leigh E. Wojewoda

Leigh E. Wojewoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11437346
    Abstract: Embodiments include a microelectronic device package structure having an inductor within a portion of a substrate, wherein the inductor is at least partially embedded within the substrate. One or more thermal vent structures extend through at least one of the substrate or a board attached to the substrate. The one or more thermal vent structures provide a thermal pathway for cooling for the inductor.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: September 6, 2022
    Assignee: Intel Corporation
    Inventors: Michael J. Hill, Leigh E. Wojewoda, Mathew Manusharow, Siddharth Kulasekaran
  • Patent number: 10741536
    Abstract: An apparatus comprises an inductor module including: a module substrate including a magnetic dielectric material; a plurality of inductive circuit elements arranged in the module substrate, wherein an inductive circuit element includes conductive traces arranged as a coil including a first coil end, a second coil end and a coil core, wherein the coil core includes the magnetic dielectric material; and a plurality of conductive contact pads electrically coupled to the first and second coil ends. The contact pads electrically coupled to the first coil ends are arranged on a first surface of the inductor module, and the contact pads electrically coupled to the second coil ends are arranged on a second surface of the inductor module.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: August 11, 2020
    Assignee: Intel Corporation
    Inventors: Yongki Min, Reynaldo A. Olmedo, William J. Lambert, Kaladhar Radhakrishnan, Leigh E. Wojewoda, Venkat Anil K. Magadala, Clive R. Hendricks
  • Publication number: 20200006287
    Abstract: Embodiments include a microelectronic device package structure having an inductor within a portion of a substrate, wherein the inductor is at least partially embedded within the substrate. One or more thermal vent structures extend through at least one of the substrate or a board attached to the substrate. The one or more thermal vent structures provide a thermal pathway for cooling for the inductor.
    Type: Application
    Filed: July 2, 2018
    Publication date: January 2, 2020
    Applicant: Intel Corporation
    Inventors: Michael J. HILL, Leigh E. WOJEWODA, Mathew MANUSHAROW, Siddharth KULASEKARAN
  • Publication number: 20190279973
    Abstract: An apparatus comprises an inductor module including: a module substrate including a magnetic dielectric material: a plurality of inductive circuit elements arranged in the module substrate, wherein an inductive circuit element includes conductive traces arranged as a coil including a first coil end, a second coil end and a coil core, wherein the coil core includes the magnetic dielectric material; and a plurality of conductive contact pads electrically coupled to the first and second coil ends. The contact pads electrically coupled to the first coil ends are arranged on a first surface of the inductor module, and the contact pads electrically coupled to the second coil ends are arranged on a second surface of the inductor module.
    Type: Application
    Filed: May 30, 2019
    Publication date: September 12, 2019
    Inventors: Yongki Min, Reynaldo A. Olmedo, William J. Lambert, Kaladhar Radhakrishnan, Leigh E. Wojewoda, Venkat Anil K. Magadla, Clive R. Hendricks
  • Patent number: 10340260
    Abstract: An apparatus comprises an inductor module including: a module substrate including a magnetic dielectric material; a plurality of inductive circuit elements arranged in the module substrate, wherein an inductive circuit element includes conductive traces arranged as a coil including a first coil end, a second coil end and a coil core, wherein the coil core includes the magnetic dielectric material; and a plurality of conductive contact pads electrically coupled to the first and second coil ends. The contact pads electrically coupled to the first coil ends are arranged on a first surface of the inductor module, and the contact pads electrically coupled to the second coil ends are arranged on a second surface of the inductor module.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: July 2, 2019
    Assignee: Intel Corporation
    Inventors: Yongki Min, Reynaldo A. Olmedo, William J. Lambert, Kaladhar Radhakrishnan, Leigh E. Wojewoda, Venkat Anil K. Magadala, Clive R. Hendricks
  • Publication number: 20180197845
    Abstract: An apparatus comprises an inductor module including: a module substrate including a magnetic dielectric material; a plurality of inductive circuit elements arranged in the module substrate, wherein an inductive circuit element includes conductive traces arranged as a coil including a first coil end, a second coil end and a coil core, wherein the coil core includes the magnetic dielectric material; and a plurality of conductive contact pads electrically coupled to the first and second coil ends. The contact pads electrically coupled to the first coil ends are arranged on a first surface of the inductor module, and the contact pads electrically coupled to the second coil ends are arranged on a second surface of the inductor module.
    Type: Application
    Filed: March 5, 2018
    Publication date: July 12, 2018
    Inventors: Yongki Min, Reynaldo A. Olmedo, William J. Lambert, Kaladhar Radhakrishnan, Leigh E. Wojewoda, Venkat Anil K. Magadala, Clive R. Hendricks
  • Patent number: 9911723
    Abstract: An apparatus comprises an inductor module including: a module substrate including a magnetic dielectric material; a plurality of inductive circuit elements arranged in the module substrate, wherein an inductive circuit element includes conductive traces arranged as a coil including a first coil end, a second coil end and a coil core, wherein the coil core includes the magnetic dielectric material; and a plurality of conductive contact pads electrically coupled to the first and second coil ends. The contact pads electrically coupled to the first coil ends are arranged on a first surface of the inductor module, and the contact pads electrically coupled to the second coil ends are arranged on a second surface of the inductor module.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: March 6, 2018
    Assignee: Intel Corporation
    Inventors: Yongki Min, Reynaldo A. Olmedo, William J. Lambert, Kaladhar Radhakrishnan, Leigh E. Wojewoda, Venkat Anil K. Magadala, Clive R. Hendricks
  • Publication number: 20170179094
    Abstract: An apparatus comprises an inductor module including: a module substrate including a magnetic dielectric material; a plurality of inductive circuit elements arranged in the module substrate, wherein an inductive circuit element includes conductive traces arranged as a coil including a first coil end, a second coil end and a coil core, wherein the coil core includes the magnetic dielectric material; and a plurality of conductive contact pads electrically coupled to the first and second coil ends. The contact pads electrically coupled to the first coil ends are arranged on a first surface of the inductor module, and the contact pads electrically coupled to the second coil ends are arranged on a second surface of the inductor module.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 22, 2017
    Inventors: Yongki Min, Reynaldo A. Olmedo, William J. Lambert, Kaladhar Radhakrishnan, Leigh E. Wojewoda, Venkat Anil K. Magadala, Clive R. Hendricks
  • Publication number: 20080128854
    Abstract: In some embodiments, an embedded array capacitor with top and bottom exterior surface metallization is presented. In this regard, an integrated circuit package is introduced having a plurality of micro-vias, a plurality of dielectric layers, and an array capacitor with metallization substantially covering an exterior surface coupled with the micro-vias and embedded in the dielectric layers. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 4, 2006
    Publication date: June 5, 2008
    Inventors: Anne E. Augustine, Leigh E. Wojewoda, Michael J. Hill
  • Patent number: 6614122
    Abstract: An apparatus, comprising: a substrate having a surface; a die attached to the substrate surface; an underfill material positioned between the substrate surface and the die; and one or more barriers on the substrate surface adjoining the die, wherein the barriers controls flow of the underfill material.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: September 2, 2003
    Assignee: Intel Corporation
    Inventors: Thomas S. Dory, HengGee Lee, David W. Young, Leigh E. Wojewoda