Abstract: In the described examples, a driver includes a signal controller that provides a gate control signal to a gate buffer coupled to a gate of a transistor and a field plate control signal to a field plate buffer coupled to a field plate of the transistor. The signal controller provides a rising edge on the field plate control signal causing the field plate buffer to provide a bias voltage on the field plate of the transistor a predetermined amount of time after providing a rising edge on the gate control signal that causes the gate buffer to provide a turn-on voltage on the gate of the transistor that causes the transistor to transition from a cutoff region to a saturation region and to a linear region.

Abstract: In the described examples, a driver includes a signal controller that provides a gate control signal to a gate buffer coupled to a gate of a transistor and a field plate control signal to a field plate buffer coupled to a field plate of the transistor. The signal controller provides a rising edge on the field plate control signal causing the field plate buffer to provide a bias voltage on the field plate of the transistor a predetermined amount of time after providing a rising edge on the gate control signal that causes the gate buffer to provide a turn-on voltage on the gate of the transistor that causes the transistor to transition from a cutoff region to a saturation region and to a linear region.

Abstract: An amplifier (10?) has a first amplifier stage (14) for producing a control current (IX) in response to an input voltage. A second amplifier stage (16) has first (46) and second (38) transistors. The first transistor (46) is coupled to receive the control current (IX) and is operable to produce a control voltage. The second transistor (38) is coupled to receive the control voltage and operable to produce an output current. A nonlinear resistive element (50) is coupled to the first transistor (46) to add a nonlinear function of the control current (IX) to the control voltage. The nonlinear resistive element (50) may include a third transistor connected between the first transistor (46) and a reference potential, operable to receive the control current (IX) and to generate the nonlinear function thereof.

Abstract: An amplifier (10?) has a first amplifier stage (14) for producing a control current (IX) in response to an input voltage. A second amplifier stage (16) has first (46) and second (38) transistors. The first transistor (46) is coupled to receive the control current (IX) and is operable to produce a control voltage. The second transistor (38) is coupled to receive the control voltage and operable to produce an output current. A nonlinear resistive element (50) is coupled to the first transistor (46) to add a nonlinear function of the control current (IX) to the control voltage. The nonlinear resistive element (50) may include a third transistor connected between the first transistor (46) and a reference potential, operable to receive the control current (IX) and to generate the nonlinear function thereof.

Abstract: An amplifier (10?) has a first amplifier stage (14) for producing a control current (IX) in response to an input voltage. A second amplifier stage (16) has first (46) and second (38) transistors. The first transistor (46) is coupled to receive the control current (IX) and is operable to produce a control voltage. The second transistor (38) is coupled to receive the control voltage and operable to produce an output current. A nonlinear resistive element (50) is coupled to the first transistor (46) to add a nonlinear function of the control current (IX) to the control voltage. The nonlinear resistive element (50) may include a third transistor connected between the first transistor (46) and a reference potential, operable to receive the control current (IX) and to generate the nonlinear function thereof.

Abstract: The present invention comprises a circuit consisting of four transistors (101-104) and an optional clamping Zener (107) arranged such that the current drawn through a load (120) is equal to the lesser of an input current (106) and a reference current (105).

Abstract: The present invention comprises a circuit consisting of four transistors (101-104) and an optional clamping Zener (107) arranged such that the current drawn through a load (120) is equal to the lesser of an input current (106) and a reference current (105).