Abstract: A graphical user interface can be provided for creating a digital certificate profile for a digital certificate. In one embodiment, the graphical user interface presents a plurality of certificate profile attributes selectable by the user. A security metric using at least two attributes of the plurality of certificate profile attributes is calculated. The security metric indicates the vulnerability of the digital certificate having the digital certificate profile. A usability metric using at least two other attributes of the plurality of certificate profile attributes is calculated. The usability metric indicates the vulnerability of the digital certificate having the digital certificate profile. A graphical representation of the security metric and the usability metric is provided in the graphical user interface.

Abstract: A graphical user interface can be provided for creating a digital certificate profile for a digital certificate. In one embodiment, the graphical user interface presents a plurality of certificate profile attributes that are selectable by a user. In one embodiment, a certificate profile preview representing an example certificate to be generated from the digital certificate profile using a subset of the selected certificate profile attributes is generated and a graphical representation of the generated certificate profile preview is provided in the graphical user interface.

Abstract: A graphical user interface can be provided for creating a digital certificate profile for a digital certificate. In one embodiment, a security metric is determined using a first subset certificate profile attributes selected by a user, and a usability metric is determined using a second subset of certificate profile attributes. Graphical representations of the security metric and a graphical representation of the usability metric can then be provided the graphical user interface. In one embodiment, the first subset of certificate profile attributes is the same as the second subset.

Abstract: A method of manufacturing a semiconductor device that eliminates the n+ contact implant by using double diffused implants under the core cell contacts by forming core, n-channel and p-channel transistors in a semiconductor substrate, simultaneously forming source and drain DDI implants for the core transistors, forming source and drain Mdd implants for the core transistors, forming source and drain Pldd implants for the p-channel transistors, forming source and drain Nldd implants for the n-channel transistors, forming sidewall spacers on the core, n-channel and p-channel transistors, forming N+ implants for the n-channel transistors, forming P+ implants for the p-channel transistors and forming P+ contact implants for the p-channel transistors.

Abstract: A method of manufacturing a flash memory semiconductor device that eliminates the step of forming sidewall spacers on n-channel and p-channel transistor gate structures. Resist spacers having a dimension of Gn+2Sn are formed on n-channel transistor gate structures and an N+ implant is performed to form N+ implant is performed to form N+ regions in the n-channel substrate region. Resist spacers having a dimension of Gs +2Sp are formed on p-channel transistor gate structures and a P+ implant is performed to form P+ regions in the p-channel substrate region.

Abstract: A method of manufacturing a semiconductor device that eliminates the N+ implant by replacement with resist spacers on n-channel gate structures and a standard Mdd implant. The N+ implant is thereby eliminated from the n-channel transistors and is replaced by an Mdd implant. The Mdd implant is simultaneously implanted into the core transistors and portions of the n-channel transistors unprotected by the resist spacers. The p-channel transistors are then implanted with a PLdd implant, the n-channel transistors are then planted with an NLdd implant, sidewall spacers are formed on all gate structures, the p-channel transistors are implanted with a P+ implant and the N+ and P+ contacts are then formed.