Patents by Inventor Len-Yi Lu

Len-Yi Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7485914
    Abstract: An interdigitized capacitor comprising first and second electrodes. The first electrode comprises two combs symmetrical to a first mirror plane. The fingers of the combs extend toward the first mirror plane. The second electrode comprises two combs and a linear plate. The combs are symmetrical to a second mirror plane and the fingers thereof extend toward the second mirror plane. The linear plate is located at the second mirror plane and connected to one finger of the combs of the second electrode. The first and second mirror planes are orthogonal. The fingers of the combs of the first and second electrodes are interdigitized.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: February 3, 2009
    Assignee: Nuvoton Technology Corporation
    Inventors: Kai-Yi Huang, Chia-Jen Hsu, Len-Yi Lu
  • Publication number: 20070126078
    Abstract: An interdigitized capacitor comprising first and second electrodes. The first electrode comprises two combs symmetrical to a first mirror plane. The fingers of the combs extend toward the first mirror plane. The second electrode comprises two combs and a linear plate. The combs are symmetrical to a second mirror plane and the fingers thereof extend toward the second mirror plane. The linear plate is located at the second mirror plane and connected to one finger of the combs of the second electrode. The first and second mirror planes are orthogonal. The fingers of the combs of the first and second electrodes are interdigitized.
    Type: Application
    Filed: June 1, 2006
    Publication date: June 7, 2007
    Inventors: Kai-Yi Huang, Chia-Jen Hsu, Len-Yi Lu
  • Publication number: 20060145262
    Abstract: A tunable ESD device for multi-power application. The ESD device comprises a substrate, at least one first well of a first conductivity, and a doped region of a second conductivity. The first wells of the first conductivity are located in the substrate. The doped region of the second conductivity substantially surrounds the first wells of the first conductivity. The doped region of the second conductivity is a drain region of a MOSFET and the distance thereto from the first wells of the first conductivity is between 0.01 ?m and 1.5 ?m.
    Type: Application
    Filed: July 11, 2005
    Publication date: July 6, 2006
    Inventors: Chien-Chih Lu, Len-Yi Lu, Kuo-Shih Teng, Kun-Huan Shih