Patents by Inventor Lenvis Liu

Lenvis Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7109565
    Abstract: The present invention includes a method of constructing a novel capacitor and geometry for the capacitor. The method and device include forming a multilayer structure having what generally can be described as a wave shape. Particular aspects of the present invention are described in the claims, specification and drawings.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: September 19, 2006
    Assignee: Macronix International Co., Ltd.
    Inventors: Lenvis Liu, Chong Jen Hwang
  • Publication number: 20040084707
    Abstract: The present invention includes a method of constructing a novel capacitor and geometry for the capacitor. The method and device include forming a multilayer structure having what generally can be described as a wave shape. Particular aspects of the present invention are described in the claims, specification and drawings.
    Type: Application
    Filed: October 28, 2003
    Publication date: May 6, 2004
    Applicant: Macronix International Co., Ltd.
    Inventors: Lenvis Liu, CJ Hwang
  • Publication number: 20030155603
    Abstract: The present invention includes a method of constructing a novel capacitor and geometry for the capacitor. The method and device include forming a multilayer structure having what generally can be described as a wave shape. Particular aspects of the present invention are described in the claims, specification and drawings.
    Type: Application
    Filed: February 15, 2002
    Publication date: August 21, 2003
    Inventors: Lenvis Liu, CJ Hwang
  • Patent number: 6271090
    Abstract: A method for manufacturing a flash memory device with dual floating gates is disclosed. The method use a self-align etching technique to form dual floating gates by using dual spacers as masks. First of all, a semiconductor substrate having a first insulating layer thereon and a first conductive layer formed over the first insulating layer is provided. Then a second insulating layer is formed and patterned to etch to form a trench therein. Next a dielectric layer is deposited and anisotropically etched to form dual spacers in the trench. After removing the second insulating layer, etching the first conductive layer to expose the first insulating layer, and removing the spacers sequentially, dual floating gates are formed.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: August 7, 2001
    Assignee: Macronix International Co., Ltd.
    Inventors: Chong-Jen Huang, Hsin-Huei Chen, Lenvis Liu, Tony Wang, Frank Chiou