Abstract: Some embodiments include apparatuses and electrical models associated with the apparatus. One of the apparatuses includes a power control unit to monitor a power state of the apparatus for entry into a standby mode. The apparatus can include a two-level memory (2LM) hardware accelerator to, responsive to a notification from the power control unit of entry into the standby mode, flush dynamic random access memory (DRAM) content from a first memory part to a second memory part. The apparatus can include processing circuitry to determine memory utilization and move memory from a first memory portion to a second memory portion responsive to memory utilization exceeding a threshold. Other methods systems and apparatuses are described.

Abstract: A machine-learning (ML) scheme running a software driver stack to learn user habits of entry into low power states, such as Modern Connect Standby (ModCS), and duration depending on time of day, and/or system telemetry. The ML creates a High Water Mark (HWM) number of dirty cache lines (DL) as a hint to a power agent. A power agent algorithm uses these hints and actual system's number of DL to inform the low power state entry decision (such as S0i4 vs. S0i3 entry decision) for a computing system.

Abstract: A machine-learning (ML) scheme running a software driver stack to learn user habits of entry into low power states, such as Modern Connect Standby (ModCS), and duration depending on time of day, and/or system telemetry. The ML creates a High Water Mark (HWM) number of dirty cache lines (DL) as a hint to a power agent. A power agent algorithm uses these hints and actual system's number of DL to inform the low power state entry decision (such as S0i4 vs. S0i3 entry decision) for a computing system.