Abstract: It is well known that the base width of a transistor has a direct bearing on transistor speed and the punch-through voltage. A solution to the transistor speed versus break down (punch through) voltage problem is disclosed. Output transistors are serially connected between power supply rails along with associated transistor base driving circuitry. The circuit arrangement ensures that the supply voltage divides between the series connected output transistors and prevents excessive voltage from being applied to each output transistor.

Abstract: Disclosed is a high performance current switch push-pull driver circuit. A first output of the current switch is direct coupled to the push-pull driver while the second output of the current switch is coupled to the push-pull driver by means of an emitter follower and current mirror. Emitter followers connected to the current switch provide a first pair of true/complement outputs while push-pull drivers provide a second set of true/complementary outputs having a higher drive capability. The current mirror is biased near its turn on potential providing current control switching of the current mode transistor and the push-pull driver transistor with which it is coupled. The circuit is greatly tolerant for varying load conditions, is protected against short circuit and power supply failures and has means for three state operation.

Abstract: A dual channel high gain differential amplifier utilizing enhancement depletion MOS field effect transistors which exhibits high common mode rejection and fast switching characteristics.

Abstract: A semiconductor device has a heavily doped semiconductor substrate with a lightly doped epitaxial layer overlying a surface of the substrate and of the same conductivity type as the substrate. Electrically insulating barriers extend from at least the surface of the epitaxial layer into the substrate so as to electrically isolate non-common areas of each surface leakage sensitive device within the epitaxial layer from the non-common areas of adjacent surface leakage sensitive devices.