Abstract: A sense amplifier circuit according to some implementations includes a differential input stage to receive mirrored input currents and a transistor switch whose state is controlled by a signal applied to its gate. The sense amplifier circuit includes a pair of cross-coupled NMOS transistors and a pair of cross-coupled PMOS transistors to which the mirrored input currents are coupled and whose drain nodes are shorted when the transistor switch is in a conductive state. The sense amplifier is arranged to generate a digital output signal indicative of which of the input currents is larger.

Abstract: A sense amplifier circuit according to some implementations includes a differential input stage to receive mirrored input currents and a transistor switch whose state is controlled by a signal applied to its gate. The sense amplifier circuit includes a pair of cross-coupled NMOS transistors and a pair of cross-coupled PMOS transistors to which the mirrored input currents are coupled and whose drain nodes are shorted when the transistor switch is in a conductive state. The sense amplifier is arranged to generate a digital output signal indicative of which of the input currents is larger.