Abstract: A method for using shared pins in a concurrent test execution environment is disclosed. The method relates to scheduling tests in concurrently executing test flows for automated test equipment (ATE) in a way so that resources can be shared between the test flows. The method comprises determining if any of a plurality of splits used by a first test contains at least one resource that is shared, wherein the first test and a second test are sequenced for execution in two separate concurrently executing test flows. The method further comprises determining if the first test should execute before the second test if the split is associated with resources required by both the second and first tests. Finally the method comprises reserving the split containing the at least one shared resource for access by the first test before beginning execution of the first test.

Abstract: A method for using shared pins in a concurrent test execution environment is disclosed. The method relates to scheduling tests in concurrently executing test flows for automated test equipment (ATE) in a way so that resources can be shared between the test flows. The method comprises determining if any of a plurality of splits used by a first test contains at least one resource that is shared, wherein the first test and a second test are sequenced for execution in two separate concurrently executing test flows. The method further comprises determining if the first test should execute before the second test if the split is associated with resources required by both the second and first tests. Finally the method comprises reserving the split containing the at least one shared resource for access by the first test before beginning execution of the first test.

Abstract: A semiconductor test system is capable of time critical sequence generation using a general purpose operating system. The semiconductor test system includes a tester hardware for providing power sources and test patterns to a device under test, a host computer operated by a general purpose operating system, a configuration software for computing configuration data and timing data based on a test program, a device driver for providing a power trigger and a signal trigger to the tester hardware, and a hardware timer for producing an interrupt signal. The device driver causes to start the test pattern and to deactivate the power sources upon receiving the interrupt signal.

Abstract: A compression and decompression apparatus to be used for transferring test pattern data from a storage device of a host computer to a pattern memory in a semiconductor test system for testing a semiconductor device to decrease the time required for the data transfer.