Abstract: A semiconductor test system is capable of time critical sequence generation using a general purpose operating system. The semiconductor test system includes a tester hardware for providing power sources and test patterns to a device under test, a host computer operated by a general purpose operating system, a configuration software for computing configuration data and timing data based on a test program, a device driver for providing a power trigger and a signal trigger to the tester hardware, and a hardware timer for producing an interrupt signal. The device driver causes to start the test pattern and to deactivate the power sources upon receiving the interrupt signal.

Abstract: An inner pipe for a faucet with a retaining cut out includes a tubular body and a cap mountable on the body. A threaded first end is formed on the body to securely mate with a threaded socket formed in the faucet. A polygonal is formed on a second end of the body and includes a circumferential slit. The cap has a ring and a flange. The ring has a polygonal bore configured to mate with the tubular exterior and provide a limited rotational movement therebetween. The flange has a lug radially extending therefrom and configured to mate with the retaining cut out of the faucet. Two resilient elements are formed on the cap and each has a tooth to engage in the circumferential slit.

Abstract: A compression and decompression apparatus to be used for transferring test pattern data from a storage device of a host computer to a pattern memory in a semiconductor test system for testing a semiconductor device to decrease the time required for the data transfer.