Patents by Inventor Leon M. Khilchenko

Leon M. Khilchenko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8115110
    Abstract: What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: February 14, 2012
    Assignee: Amphenol Corporation
    Inventors: Leon M. Khilchenko, Mark W. Gailus
  • Patent number: 7630210
    Abstract: A contact tail for an electronic component useful for attachment of components using conductive adhesive, which may be lead (Pb)-free. The contact tail is stamped, providing a relatively low manufacturing cost and high precision. The contact tail has a distal portion with a large surface area per unit length. The distal portion shapes conductive adhesive into a joint, holding the adhesive adjacent the lead for a more secure joint. Additionally, the distal portion holds adhesive to the contact tail before a joint is formed, facilitating the use of an adhesive transfer process to dispense adhesive. To further aid in the transfer of adhesive, the contact tail may be formed with concave portions, which increase the volume of adhesive adhering to the contact tail. By adhering an increased but controlled amount of adhesive to the contact tail, arrays of contact tails may be simply and reliably attached to printed circuit boards and other substrates.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: December 8, 2009
    Assignee: Amphenol Corporation
    Inventors: Mark W. Gailus, Leon M. Khilchenko
  • Patent number: 7508681
    Abstract: In the preferred embodiment, there is disclosed a printed circuit board having a surface providing a mating interface to which is electrically connected an electrical connector having signal conductors and ground conductors. The printed circuit board includes a plurality of stacked dielectric layers, with a conductor disposed on at least one of the plurality of dielectric layers. The mating interface includes a plurality of conductive vias aligned in a plurality of rows, with the plurality of conductive vias extending through at least a portion of the plurality of dielectric layers, at least one of the plurality of conductive vias intersecting the conductor. The plurality of conductive vias includes signal conductor connecting conductive vias and ground conductor connecting conductive vias.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: March 24, 2009
    Assignee: Amphenol Corporation
    Inventors: Jason J. Payne, Mark W. Gailus, Leon M. Khilchenko, Huilin Ren
  • Patent number: 7484971
    Abstract: A contact tail for an electronic component compatible with surface mount manufacturing techniques. The contact tail is stamped, providing a relatively low manufacturing cost and high precision. High precision in the contact tails in turn provides more reliable solder joints across an array of contact tails in an electronic component. Further, the contact tail may be shaped to reduce the propensity for solder to wick from the attachment area during a reflow operation. Reducing the propensity of solder to wick reduces the chance that solder will interfere with the operation of the electronic component. Additionally, reducing the propensity for solder to wick allows pads to which the contact tail is attached to be positioned over vias, thereby increasing the density with which contacts may be attached to a substrate. The reliability with which electronic assemblies incorporating components using the contact tail is also increased when the contact tail is used in self-centering arrays.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: February 3, 2009
    Assignee: Amphenol Corporation
    Inventors: Mark W. Gailus, Leon M. Khilchenko
  • Patent number: 7240425
    Abstract: What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: July 10, 2007
    Assignee: Amphenol Corporation
    Inventors: Leon M. Khilchenko, Mark W. Gailus
  • Patent number: 7242592
    Abstract: In the preferred embodiment, there is disclosed a printed circuit board having a surface providing a mating interface to which is electrically connected an electrical connector having signal conductors and ground conductors. The printed circuit board includes a plurality of stacked dielectric layers, with a conductor disposed on at least one of the plurality of dielectric layers. The mating interface includes a plurality of conductive vias aligned in a plurality of rows, with the plurality of conductive vias extending through at least a portion of the plurality of dielectric layers, at least one of the plurality of conductive vias intersecting the conductor. The plurality of conductive vias includes signal conductor connecting conductive vias and ground conductor connecting conductive vias.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: July 10, 2007
    Assignee: Amphenol Corporation
    Inventors: Jason J. Payne, Mark W. Gailus, Leon M. Khilchenko, Huilin Ren
  • Publication number: 20040264153
    Abstract: In the preferred embodiment, there is disclosed a printed circuit board having a surface providing a mating interface to which is electrically connected an electrical connector having signal conductors and ground conductors. The printed circuit board includes a plurality of stacked dielectric layers, with a conductor disposed on at least one of the plurality of dielectric layers. The mating interface includes a plurality of conductive vias aligned in a plurality of rows, with the plurality of conductive vias extending through at least a portion of the plurality of dielectric layers, at least one of the plurality of conductive vias intersecting the conductor. The plurality of conductive vias includes signal conductor connecting conductive vias and ground conductor connecting conductive vias.
    Type: Application
    Filed: June 24, 2003
    Publication date: December 30, 2004
    Inventors: Jason J. Payne, Mark W. Gailus, Leon M. Khilchenko, Huilin Ren
  • Publication number: 20040212972
    Abstract: What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.
    Type: Application
    Filed: April 24, 2003
    Publication date: October 28, 2004
    Inventors: Leon M. Khilchenko, Mark W. Gailus