Patents by Inventor Leon Stiborek

Leon Stiborek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11271296
    Abstract: An antenna includes a metal member having a surface that includes a slot. The metal member includes a plurality of legs orthogonal to the surface of the metal member. The plurality of legs are configured to be attached to a circuit board. A first dielectric material is in the slot.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: March 8, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Leon Stiborek, Alexey Berd, Daniel Lee Revier
  • Publication number: 20200273720
    Abstract: A method includes removing an oxide layer from select areas of a surface of a metal structure of a lead frame to create openings that extend through the oxide layer to expose portions of the surface of the metal structure. The method further includes attaching a semiconductor die to the lead frame, performing an electrical connection process that electrically couples an exposed portion of the surface of the metal structure to a conductive feature of the semiconductor die, enclosing the semiconductor die in a package structure, and separating the electronic device from the lead frame. In one example, the openings are created by a laser ablation process. In another example, the openings are created by a chemical etch process using a mask. In another example, the openings are created by a plasma process.
    Type: Application
    Filed: February 27, 2020
    Publication date: August 27, 2020
    Inventor: Leon Stiborek
  • Publication number: 20190148823
    Abstract: An antenna includes a metal member having a surface that includes a slot. The metal member includes a plurality of legs orthogonal to the surface of the metal member. The plurality of legs are configured to be attached to a circuit board. A first dielectric material is in the slot.
    Type: Application
    Filed: November 6, 2018
    Publication date: May 16, 2019
    Inventors: Leon STIBOREK, Alexey BERD, Daniel Lee REVIER
  • Publication number: 20080158842
    Abstract: A contact grid array interconnect element for mounting an IC package to a substrate. The interconnect comprises an insulating stand-off post having opposing ends. An electrically conductive core is embedded in and traverses the post. Conductive endplates are located on the opposing ends of the post and contact the core.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Applicant: Texas Instruments Incorporated
    Inventor: Leon Stiborek
  • Publication number: 20080085573
    Abstract: Disclosed are methods for dispensing underfill material in an IC assembly having a die mounted on a substrate with a gap therebetween. One or more aperture is provided in the substrate for receiving underfill material into the gap. Underfill material is dispensed into the gap through the one or more apertures, thereby filling the gap with underfill material and providing a favorable flow rate and improved underfilling. Embodiments of the invention are disclosed in which capillary action, a vacuum, or positive pressure, are used to assist in the flow of the underfill material.
    Type: Application
    Filed: November 29, 2007
    Publication date: April 10, 2008
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Charles Odegard, Marvin Cowens, Leon Stiborek
  • Patent number: 7244664
    Abstract: The present invention provides, in one embodiment, a semiconductor wafer (100) dicing process. The dicing process comprises removing circuit features (120) from a street (115) located between dies (105) on a semiconductor substrate (102) using a first blade (135), such that the semiconductor substrate is exposed, and cutting through the exposed semiconductor substrate using a second blade (190). The first blade has a surface (140) coated with an abrasive material (145) comprising grit particles (150), having a median diameter (155) of at least about 25 microns. The grit particles are adhered to the first blade with a bonding agent (160) having a hardness of about 80 or less (Rockwell B Hardness scale). The grit particles have a concentration in the bonding agent ranging from about 25 to about 50 vol %. Another embodiment of the invention is a method of manufacturing a semiconductor device (200).
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: July 17, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: David B. Blair, Leon Stiborek
  • Publication number: 20060234427
    Abstract: Disclosed are methods for dispensing underfill material in an IC assembly having a die mounted on a substrate with a gap therebetween. One or more aperture is provided in the substrate for receiving underfill material into the gap. Underfill material is dispensed into the gap through the one or more apertures, thereby filling the gap with underfill material and providing a favorable flow rate and improved underfilling. Embodiments of the invention are disclosed in which capillary action, a vacuum, or positive pressure, are used to assist in the flow of the underfill material.
    Type: Application
    Filed: April 19, 2005
    Publication date: October 19, 2006
    Inventors: Charles Odegard, Marvin Cowens, Leon Stiborek
  • Publication number: 20050095816
    Abstract: The present invention provides, in one embodiment, a semiconductor wafer (100) dicing process. The dicing process comprises removing circuit features (120) from a street (115) located between dies (105) on a semiconductor substrate (102) using a first blade (135), such that the semiconductor substrate is exposed, and cutting through the exposed semiconductor substrate using a second blade (190). The first blade has a surface (140) coated with an abrasive material (145) comprising grit particles (150), having a median diameter (155) of at least about 25 microns. The grit particles are adhered to the first blade with a bonding agent (160) having a hardness of about 80 or less (Rockwell B Hardness scale). The grit particles have a concentration in the bonding agent ranging from about 25 to about 50 vol %. Another embodiment of the invention is a method of manufacturing a semiconductor device (200).
    Type: Application
    Filed: October 27, 2004
    Publication date: May 5, 2005
    Applicant: Texas Instruments Incorporated
    Inventors: David Blair, Leon Stiborek
  • Publication number: 20040037059
    Abstract: A packaged integrated circuit including a substrate 310 having first and second opposing surfaces, wherein the first surface has a central chip pad location and a peripheral area surrounding the chip pad location. At least a portion of the peripheral area is covered by a spacer 330. An integrated circuit chip 300 is mounted on the chip pad location, and a heatsink 350 is mounted over the first surface of the substrate and attached to the chip and to the spacer. The spacer can be continuous and made to surround the chip pad location, or it can be discontinuous and placed at discrete locations in the peripheral area.
    Type: Application
    Filed: August 21, 2002
    Publication date: February 26, 2004
    Inventors: Leon Stiborek, Jeremias P. Libres
  • Publication number: 20040007780
    Abstract: Disclosed is a high thermal conductance attachment mixture for semiconductor package assembly which includes high thermal conductance particles suspended in reflowable material. The high thermal conductance particles have a high melting point relative to the reflowable material and comprise approximately 50% to approximately 95% by volume of the high thermal conductance attachment mixture. Also disclosed is a semiconductor package including the high thermal conductance attachment mixture. An associated method of attaching adjoining layers of a semiconductor die package using a high thermal conductance attachment mixture is also disclosed.
    Type: Application
    Filed: July 9, 2002
    Publication date: January 15, 2004
    Inventors: Paul Joseph Hundt, Leon Stiborek
  • Publication number: 20030136394
    Abstract: An improved dicing wheel configuration is described herein. In one embodiment, the dicing wheel comprises: a hub, a blade, and an annular support. The hub is mounted on a shaft, and it clasps the blade. The annular support is compressed against the blade by the hub, and it has an outer diameter intermediate the outer diameters of the hub and the blade. A second annular support may also be compressed against the blade on the opposite side from the first annular support, and the annular support(s) may be separable from or bonded to the blade. The improved configuration preferably provides sufficient clearance for the hub to pass over solder bumps, stacked dies, or other protrusions on the wafer. The invention further contemplates methods for forming and using such a dicing wheel, as well as chips cut using such a dicing wheel.
    Type: Application
    Filed: August 29, 2002
    Publication date: July 24, 2003
    Applicant: Texas Instruments Incorporated
    Inventors: David B. Blair, Leon Stiborek, Paul J. Hundt
  • Patent number: 6052286
    Abstract: A polymeric three-layer membrane having metal-filled microscopic pores extending through the complete thickness of the membrane, including a central restraining core layer, and an adhesive layer on each surface of the core layer. The membrane is used to form interconnects between electronic parts.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: April 18, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Karl L. Worthen, Leon Stiborek
  • Patent number: 5397854
    Abstract: An absorber for a microwave module and method of fabrication thereof wherein an ink is provided from a mixture of powdered iron and a resin. The ink is then screen printed or mask printed onto the interior surface of the lid of the microwave module in a predetermined pattern to lower the Q of the cavities within the module. The lowered Q suppresses the electromagnetic resonance and thereby minimizes the EMI problems. Furthermore, the absorber material reduces EMI between sections of the module at frequencies where no cavity resonances occur.
    Type: Grant
    Filed: January 11, 1993
    Date of Patent: March 14, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Martin L. Catt, Gray E. Fowler, Donald L. Purinton, Leon Stiborek
  • Patent number: 5324887
    Abstract: An absorber for a microwave module and method of fabrication thereof wherein an ink is provided from a mixture of powdered iron and a resin. The ink is then screen printed or mask printed onto the interior surface of the lid of the microwave module in a predetermined pattern to lower the Q of the cavities within the module. The lowered Q suppresses the electromagnetic resonance and thereby minimizes the EMI problems. Furthermore, the absorber material reduces EMI between sections of the module at frequencies where no cavity resonances occur.
    Type: Grant
    Filed: June 26, 1992
    Date of Patent: June 28, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Martin L. Catt, Gray E. Fowler, Donald L. Purinton, Leon Stiborek