Patents by Inventor Leon Stiborek
Leon Stiborek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11271296Abstract: An antenna includes a metal member having a surface that includes a slot. The metal member includes a plurality of legs orthogonal to the surface of the metal member. The plurality of legs are configured to be attached to a circuit board. A first dielectric material is in the slot.Type: GrantFiled: November 6, 2018Date of Patent: March 8, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Leon Stiborek, Alexey Berd, Daniel Lee Revier
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Publication number: 20200273720Abstract: A method includes removing an oxide layer from select areas of a surface of a metal structure of a lead frame to create openings that extend through the oxide layer to expose portions of the surface of the metal structure. The method further includes attaching a semiconductor die to the lead frame, performing an electrical connection process that electrically couples an exposed portion of the surface of the metal structure to a conductive feature of the semiconductor die, enclosing the semiconductor die in a package structure, and separating the electronic device from the lead frame. In one example, the openings are created by a laser ablation process. In another example, the openings are created by a chemical etch process using a mask. In another example, the openings are created by a plasma process.Type: ApplicationFiled: February 27, 2020Publication date: August 27, 2020Inventor: Leon Stiborek
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Publication number: 20190148823Abstract: An antenna includes a metal member having a surface that includes a slot. The metal member includes a plurality of legs orthogonal to the surface of the metal member. The plurality of legs are configured to be attached to a circuit board. A first dielectric material is in the slot.Type: ApplicationFiled: November 6, 2018Publication date: May 16, 2019Inventors: Leon STIBOREK, Alexey BERD, Daniel Lee REVIER
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STRESS AND COLLAPSE RESISTANT INTERCONNECT FOR MOUNTING AN INTEGRATED CIRCUIT PACKAGE TO A SUBSTRATE
Publication number: 20080158842Abstract: A contact grid array interconnect element for mounting an IC package to a substrate. The interconnect comprises an insulating stand-off post having opposing ends. An electrically conductive core is embedded in and traverses the post. Conductive endplates are located on the opposing ends of the post and contact the core.Type: ApplicationFiled: December 29, 2006Publication date: July 3, 2008Applicant: Texas Instruments IncorporatedInventor: Leon Stiborek -
Publication number: 20080085573Abstract: Disclosed are methods for dispensing underfill material in an IC assembly having a die mounted on a substrate with a gap therebetween. One or more aperture is provided in the substrate for receiving underfill material into the gap. Underfill material is dispensed into the gap through the one or more apertures, thereby filling the gap with underfill material and providing a favorable flow rate and improved underfilling. Embodiments of the invention are disclosed in which capillary action, a vacuum, or positive pressure, are used to assist in the flow of the underfill material.Type: ApplicationFiled: November 29, 2007Publication date: April 10, 2008Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Charles Odegard, Marvin Cowens, Leon Stiborek
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Patent number: 7244664Abstract: The present invention provides, in one embodiment, a semiconductor wafer (100) dicing process. The dicing process comprises removing circuit features (120) from a street (115) located between dies (105) on a semiconductor substrate (102) using a first blade (135), such that the semiconductor substrate is exposed, and cutting through the exposed semiconductor substrate using a second blade (190). The first blade has a surface (140) coated with an abrasive material (145) comprising grit particles (150), having a median diameter (155) of at least about 25 microns. The grit particles are adhered to the first blade with a bonding agent (160) having a hardness of about 80 or less (Rockwell B Hardness scale). The grit particles have a concentration in the bonding agent ranging from about 25 to about 50 vol %. Another embodiment of the invention is a method of manufacturing a semiconductor device (200).Type: GrantFiled: October 27, 2004Date of Patent: July 17, 2007Assignee: Texas Instruments IncorporatedInventors: David B. Blair, Leon Stiborek
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Publication number: 20060234427Abstract: Disclosed are methods for dispensing underfill material in an IC assembly having a die mounted on a substrate with a gap therebetween. One or more aperture is provided in the substrate for receiving underfill material into the gap. Underfill material is dispensed into the gap through the one or more apertures, thereby filling the gap with underfill material and providing a favorable flow rate and improved underfilling. Embodiments of the invention are disclosed in which capillary action, a vacuum, or positive pressure, are used to assist in the flow of the underfill material.Type: ApplicationFiled: April 19, 2005Publication date: October 19, 2006Inventors: Charles Odegard, Marvin Cowens, Leon Stiborek
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Publication number: 20050095816Abstract: The present invention provides, in one embodiment, a semiconductor wafer (100) dicing process. The dicing process comprises removing circuit features (120) from a street (115) located between dies (105) on a semiconductor substrate (102) using a first blade (135), such that the semiconductor substrate is exposed, and cutting through the exposed semiconductor substrate using a second blade (190). The first blade has a surface (140) coated with an abrasive material (145) comprising grit particles (150), having a median diameter (155) of at least about 25 microns. The grit particles are adhered to the first blade with a bonding agent (160) having a hardness of about 80 or less (Rockwell B Hardness scale). The grit particles have a concentration in the bonding agent ranging from about 25 to about 50 vol %. Another embodiment of the invention is a method of manufacturing a semiconductor device (200).Type: ApplicationFiled: October 27, 2004Publication date: May 5, 2005Applicant: Texas Instruments IncorporatedInventors: David Blair, Leon Stiborek
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Publication number: 20040037059Abstract: A packaged integrated circuit including a substrate 310 having first and second opposing surfaces, wherein the first surface has a central chip pad location and a peripheral area surrounding the chip pad location. At least a portion of the peripheral area is covered by a spacer 330. An integrated circuit chip 300 is mounted on the chip pad location, and a heatsink 350 is mounted over the first surface of the substrate and attached to the chip and to the spacer. The spacer can be continuous and made to surround the chip pad location, or it can be discontinuous and placed at discrete locations in the peripheral area.Type: ApplicationFiled: August 21, 2002Publication date: February 26, 2004Inventors: Leon Stiborek, Jeremias P. Libres
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Publication number: 20040007780Abstract: Disclosed is a high thermal conductance attachment mixture for semiconductor package assembly which includes high thermal conductance particles suspended in reflowable material. The high thermal conductance particles have a high melting point relative to the reflowable material and comprise approximately 50% to approximately 95% by volume of the high thermal conductance attachment mixture. Also disclosed is a semiconductor package including the high thermal conductance attachment mixture. An associated method of attaching adjoining layers of a semiconductor die package using a high thermal conductance attachment mixture is also disclosed.Type: ApplicationFiled: July 9, 2002Publication date: January 15, 2004Inventors: Paul Joseph Hundt, Leon Stiborek
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Publication number: 20030136394Abstract: An improved dicing wheel configuration is described herein. In one embodiment, the dicing wheel comprises: a hub, a blade, and an annular support. The hub is mounted on a shaft, and it clasps the blade. The annular support is compressed against the blade by the hub, and it has an outer diameter intermediate the outer diameters of the hub and the blade. A second annular support may also be compressed against the blade on the opposite side from the first annular support, and the annular support(s) may be separable from or bonded to the blade. The improved configuration preferably provides sufficient clearance for the hub to pass over solder bumps, stacked dies, or other protrusions on the wafer. The invention further contemplates methods for forming and using such a dicing wheel, as well as chips cut using such a dicing wheel.Type: ApplicationFiled: August 29, 2002Publication date: July 24, 2003Applicant: Texas Instruments IncorporatedInventors: David B. Blair, Leon Stiborek, Paul J. Hundt
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Patent number: 6052286Abstract: A polymeric three-layer membrane having metal-filled microscopic pores extending through the complete thickness of the membrane, including a central restraining core layer, and an adhesive layer on each surface of the core layer. The membrane is used to form interconnects between electronic parts.Type: GrantFiled: April 8, 1998Date of Patent: April 18, 2000Assignee: Texas Instruments IncorporatedInventors: Karl L. Worthen, Leon Stiborek
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Patent number: 5397854Abstract: An absorber for a microwave module and method of fabrication thereof wherein an ink is provided from a mixture of powdered iron and a resin. The ink is then screen printed or mask printed onto the interior surface of the lid of the microwave module in a predetermined pattern to lower the Q of the cavities within the module. The lowered Q suppresses the electromagnetic resonance and thereby minimizes the EMI problems. Furthermore, the absorber material reduces EMI between sections of the module at frequencies where no cavity resonances occur.Type: GrantFiled: January 11, 1993Date of Patent: March 14, 1995Assignee: Texas Instruments IncorporatedInventors: Martin L. Catt, Gray E. Fowler, Donald L. Purinton, Leon Stiborek
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Patent number: 5324887Abstract: An absorber for a microwave module and method of fabrication thereof wherein an ink is provided from a mixture of powdered iron and a resin. The ink is then screen printed or mask printed onto the interior surface of the lid of the microwave module in a predetermined pattern to lower the Q of the cavities within the module. The lowered Q suppresses the electromagnetic resonance and thereby minimizes the EMI problems. Furthermore, the absorber material reduces EMI between sections of the module at frequencies where no cavity resonances occur.Type: GrantFiled: June 26, 1992Date of Patent: June 28, 1994Assignee: Texas Instruments IncorporatedInventors: Martin L. Catt, Gray E. Fowler, Donald L. Purinton, Leon Stiborek