Abstract: A storage drive includes a first memory that stores first text. A first processor generates a first instruction to decrypt the first text. A cryptographic module includes a second memory, a cryptographic device, a memory module, and a second processor. The second memory is inaccessible to the first processor and stores a cryptographic key. The cryptographic device accesses the second memory to obtain the cryptographic key and based on the first instruction, decrypts the first text. The memory module stores a status of execution of the first instruction by the cryptographic device. The second processor, prior to the cryptographic device decrypting the first text, forwards the first instruction to the cryptographic device and stores the status of execution of the first instruction in the memory module. The memory module is connected between the first and second processors and isolates the first processor from the second processor.

Abstract: Cryptographic apparatus having corresponding methods and computer-readable media comprise: a mailbox memory module to store cryptographic commands received from a client over a client bus, wherein the client is external to the cryptographic apparatus; and a secure processor to obtain the cryptographic commands from the mailbox memory module over a first secure internal bus, execute the cryptographic commands, and store a status of execution of the cryptographic commands in the mailbox memory module over the first secure internal bus, wherein the client obtains the status of the cryptographic commands from the mailbox memory module over the client bus.

Abstract: A data management system for a data storage device includes a management module and a memory module. The management module manages a plurality of nodes of a linked list based on one of a plurality of parameter sets that indicates a location of a data field within each of the plurality of nodes. The memory module stores data indicative of the one of the plurality of parameter sets.

Abstract: In accordance with one aspect of the current invention, the system comprises a memory for storing instruction sequences by which the processor-based system is processed, where the memory includes a physical memory and a virtual memory. The system also comprises a processor for executing the stored instruction sequences. The stored instruction sequences include process acts to cause the processor to: map a plurality of predetermined instruction sequences from the physical memory to the virtual memory, determine an offset to one of the plurality of predetermined instruction sequences in the virtual memory, receive an instruction to execute the one of the plurality of predetermined instruction sequences, transfer control to the one of the plurality of predetermined instruction sequences, and process the one of the plurality of predetermined instruction sequences from the virtual memory.

Abstract: A flash memory is secured by disabling write access to the device, thereby preventing unauthorized updating or tampering of the contents. A cryptoengine is included in an integrated circuit (IC) with the flash memory. An attempt to write to the flash memory is successful only if a received encrypted certificate is authenticated by the cryptoengine. If not authenticated, the write enable signal line and the power applied to the flash memory are disabled.

Abstract: A method for validating expansion ROM cards which are loaded into a Personal Computer. A ROM image is signed (encrypted) using a private key and an encryption algorithm to create a digital signature. The digital signature is stored along with the ROM image on an expansion ROM. The system BIOS scans the system for the presence of an expansion ROM and when one is detected, the digital signature is verified (decrypted) using a public key corresponding to the private key. If the decrypted digital signature matches the ROM image (or a hash digest thereof), then the BIOS loads the ROM image.

Abstract: In accordance with one aspect of the current invention, the system comprises a memory for storing instruction sequences by which the processor-based system is processed, where the memory includes a physical memory and a virtual memory. The system also comprises a processor for executing the stored instruction sequences. The stored instruction sequences include process acts to cause the processor to: map a plurality of predetermined instruction sequences from the physical memory to the virtual memory, determine an offset to one of the plurality of predetermined instruction sequences in the virtual memory, receive an instruction to execute the one of the plurality of predetermined instruction sequences, transfer control to the one of the plurality of predetermined instruction sequences, and process the one of the plurality of predetermined instruction sequences from the virtual memory.