Patents by Inventor Leonard J. M. Esser

Leonard J. M. Esser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5208689
    Abstract: An LCD device in which the pixels are divided into sub-pixels composed of one analog adjustable sub-pixel and a plurality of digitally controlled other sub-pixels. By combining a discrete adjustment of the (sub)-transmission levels of the other sub-pixels with an analog adjustment of transmission levels of the one sub-pixel, the total number of light transmission levels is increased considerably. The analog adjustment thus is less critical because the greater part of the ultimate level is defined by the accurate discrete adjustment.
    Type: Grant
    Filed: August 19, 1991
    Date of Patent: May 4, 1993
    Assignee: U.S. Philips Corporation
    Inventors: Wilbert J. A. M. Hartmann, Leonard J. M. Esser, Antonius G. H. Verhulst, Johannes A. M. M. Van Haaren
  • Patent number: 4951148
    Abstract: In a CCD image sensor arrangement, during the transport through the CCD channels the distance between successive signal packets is enlarged and an empty potential well is induced between these packets, which is then transferred as a normal packet together with the signal charges. During the transport, in the said additional well charge is collected which is representative for the smear charge which is trapped during the transport by the corresponding signal packet. When during reading, the smear charge is subtracted from the signal charge, the accurate value of the smear-compensated signals can be determined.
    Type: Grant
    Filed: December 9, 1988
    Date of Patent: August 21, 1990
    Assignee: U.S. Philips Corporation
    Inventors: Leonard J. M. Esser, Jacobus G. C. Bakker, Marnix G. Collet
  • Patent number: 4903284
    Abstract: The invention relates to a charge-coupled device of the accordion type provided with a shift register for supplying accordion clock voltages on the one hand and with clock lines for supplying conventiional clock voltages on the other hand. The electrodes are alternatively coupled to the shift register and to the clock lines. The dissipation can be considerably reduced in this device. Moreover, the transport direction can be reversed in a simple manner, which is of importance, for example, in image sensors for smear suppression.
    Type: Grant
    Filed: November 23, 1987
    Date of Patent: February 20, 1990
    Assignee: U.S. Philips Corp.
    Inventor: Leonard J. M. Esser
  • Patent number: 4878102
    Abstract: A charge-coupled device comprising two clock electrodes (4,5) on the two opposite sides of the charge transport channel (3) and which extend the entire length of the channel. Charge storage regions (6-9) are located zigzagwise on both sides of the channel, as a result of which during charge transport the charge is transferred from one side to the other. Due to the separation of the electrodes the parasitic capacitance between them is low, achieving low power dissipation. The electrodes are located in grooves at the sides of the channel, leaving the surface of the channel unobstructed. The device can therefore serve as an image sensor of high sensitivity.
    Type: Grant
    Filed: November 18, 1988
    Date of Patent: October 31, 1989
    Assignee: U.S. Philips Corp.
    Inventors: Jacobus G. C. Bakker, Leonard J. M. Esser
  • Patent number: 4807005
    Abstract: The present invention involves a semiconductor device, such as a shift register, wherein information in the form of charge carriers is moved laterally through the bulk of a semiconductor layer by means of an electric field, while the charge carriers are stored at the surface of the semiconductor layer. According to this invention, information containing regions can be separated from each other by depletion zones extending through the thickness and the width of the semiconductor layer. Charge transport laterally through the interior of the semiconductor layer results in a considerable reduction of the transport time. Majority charge carriers are advantageously used.
    Type: Grant
    Filed: April 16, 1981
    Date of Patent: February 21, 1989
    Assignee: U.S. Philips Corporation
    Inventors: Leonard J. M. Esser, Gijsbert Lock
  • Patent number: 4799109
    Abstract: The invention relates to a charge-coupled image sensor of the line transfer type comprising a number of parallel lines (2-6) which are each constituted by an n-phase CCD. An electrode (12-16) of each CCD is arranged parallel to this CCD separately for each CCD. The other (n-1) electrodes (17-20) extend transversely to the charge transport direction over all CCD's. The first-mentioned electrode (12-16) is used as a selection gate and is moreover used, depending upon the applied voltage, as an integration gate or as a blocking gate during the integration period.
    Type: Grant
    Filed: January 27, 1988
    Date of Patent: January 17, 1989
    Assignee: U.S. Philips Corp.
    Inventors: Leonard J. M. Esser, Marcellinus J. M. Pelgrom
  • Patent number: 4730209
    Abstract: A color television Y/U/V luminance-chrominance multiplex signal with signals which may or may not be compressed in time comprises for a television line the associated luminance information Y and half the chrominance information U or V. As a result the circuit should supply the chrominance information directly (U, V) and repeatedly (U', V') during a subsequent television line. To avoid the use of an accurate, expensive delay device having a line period delay, the circuit includes an input shift register (A) of the series-in, parallel-out type, which is coupled through an on-off switch circuit (B1, B2) to parallel inputs of two shift registers (C1, C2) of the parallel-in, series-out type. During a line blanking period (THB) writing is effected from the input shift register in the output shift registers and during two subsequent line scan periods (THS1, THS2) reading is effected consecutively therefrom. Reading may be effected in opposite phase if a repetition is to be effected after exactly one line period.
    Type: Grant
    Filed: February 27, 1986
    Date of Patent: March 8, 1988
    Assignee: U.S. Philips Corporation
    Inventors: Leendert J. Van De Polder, Leonard J. M. Esser
  • Patent number: 4717944
    Abstract: A semiconductor device including a field effect transistor, such as an insulated gate field effect transistor, which has in the direction from source zone to drain zone successive first and second channel zones with associated gate electrode parts. According to the invention, over at least 80% of the overall channel width, in a direction at right angles to the direction of source-drain current, the ratio L.sub.1 /L.sub.2 between the length L.sub.1 of the first gate electrode part and the length L.sub.2 of the second gate electrode part is variable and smaller than unity in order to improve the linearity of the field effect transistor.
    Type: Grant
    Filed: October 23, 1986
    Date of Patent: January 5, 1988
    Assignee: U.S. Philips Corporation
    Inventors: Petrus J. A. M. Van de Wiel, Leonard J. M. Esser
  • Patent number: 4716446
    Abstract: A semiconductor device comprising a field effect transistor of the lateral or vertical DMOST type having a source zone of the one conductivity type, an adjoining channel region of the other conductivity type, a drain zone of the one conductivity type and a weakly doped drift region located between the drain zone and the channel region. According to the invention a second gate electrode located on the side of the drain zone and separated from the first gate electrode is disposed on the insulating layer above the channel zone behind the first gate electrode located on the side of the source zone. The length L.sub.2 of the part of the second gate electrode located above the channel zone is at least equal to that of the part of the first gate electrode located above the channel zone. As a result, a high value of the mutual conductance g.sub.m as well as good linearity can be obtained.
    Type: Grant
    Filed: June 9, 1986
    Date of Patent: December 29, 1987
    Assignee: U.S. Philips Corporation
    Inventors: Leonard J. M. Esser, Petrus J. A. M. Van de Wiel, Leonardus A. Daverveld, Johannes A. A. Van Gils
  • Patent number: 4677650
    Abstract: In a CCD, especially in an image sensor device, the information density can be doubled by sequentially switching the electrodes between a clock signal and a reference signal. Clock signals and reference signals are obtained as output signals of a shift register controlled by a monophase or multiphase clock. The register is provided, for example, using C-MOS technology. Information at the input terminal of the first stage of the shift register in combination with clock pulse signals at the register clock, determine the output signals of the next stage of the shift register. Hence, these input signals determine the voltage variations at the electrodes connected to the outputs of the register stages.
    Type: Grant
    Filed: June 7, 1984
    Date of Patent: June 30, 1987
    Assignee: U.S. Philips Corporation
    Inventors: Arnoldus J. J. Boudewijns, Leonard J. M. Esser
  • Patent number: 4649554
    Abstract: In a charge transfer device in accordance with the invention, the channel is subdivided at the area of the output into two subchannels provided with separate output gates which are clocked in phase opposition, and with separate reset gates which are likewise clocked in phase opposition. Between the output gates and the reset gates there is arranged a floating gate common to both subchannels by which signals can be read during 100% of a clock period so that no additional filtering operations for filtering out spectra of higher order are required. This output circuit can be used in applications in which high speeds and a high sensitivity are required.
    Type: Grant
    Filed: January 15, 1986
    Date of Patent: March 10, 1987
    Assignee: U.S. Philips Corporation
    Inventors: Arnoldus J. J. Boudewijns, Leonard J. M. Esser
  • Patent number: 4590506
    Abstract: By the use of high-ohmic polycrystalline silicon (poly) in MIS elements, a depletion layer can be formed in the poly material which brings about an electric decoupling between the poly (gate) and the underlying semiconductor body. This effect can be utilized advantageously in various circuit elements, such as in CCD's, in order to obtain a favorable potential distribution in the substrate; in MOS transistors in order to reduce the parasitic capacities; and in high-voltage devices in order to increase the breakdown voltage at the edge of the field plate (resurf).
    Type: Grant
    Filed: October 6, 1983
    Date of Patent: May 20, 1986
    Assignee: U.S. Philips Corporation
    Inventor: Leonard J. M. Esser
  • Patent number: 4590509
    Abstract: By the use of high-ohmic polycrystalline silicon(poly) in MIS elements, a depletion layer can be formed in the poly material which brings about an electric decoupling between the poly (gate) and the underlying semiconductor body. This effect can be utilized advantageously in various circuit elements, such as in CCD's, in order to obtain a favorable potential distribution in the substrate; in MOS transistors in order to reduce the parasitic capacities; and in high-voltage devices in order to increase the breakdown voltage at the edge of the field plate (resurf).
    Type: Grant
    Filed: October 6, 1983
    Date of Patent: May 20, 1986
    Assignee: U.S. Philips Corporation
    Inventors: Leonard J. M. Esser, Henricus M. J. Vaes, Adrianus W. Ludikhuize
  • Patent number: 4586064
    Abstract: By the use of high-resistivity polycrystalline silicon (poly) in MIS elements, a depletion layer can be formed in the poly material which brings about an electric decoupling between the poly (gate) and the underlying semiconductor body. This effect can be utilized advantageously in various circuit elements, such as in CCD's, in order to obtain a favorable potential distribution in the substrate; in MOS transistors in order to reduce the parasitic capacities; and in high-voltage devices in order to increase the breakdown voltage at the edge of the field plate (resurf).
    Type: Grant
    Filed: October 6, 1983
    Date of Patent: April 29, 1986
    Assignee: U.S. Philips Corporation
    Inventors: Leonard J. M. Esser, Hermanus J. H. Wilting, Eduard F. Stikvoort
  • Patent number: 4475125
    Abstract: A television pick-up arrangement comprising a solid-state picture pick-up device rows of picture pick-up elements of which are connectable to parallel inputs of two output shift registers. When the shift registers are read simultaneously they supply at their series outputs picture signal which are associated with each time two pairs of rows of picture pick-up elements. According to the invention, the two picture signals are applied on the one hand separately to a vertical aperture correction circuit having only one delay device with a time delay of one line period and on the other hand combined to a horizontal aperture correction circuit, the corrected signals being combined behind said correction circuits. Advantageous use can then be made of a device in which pick-up information is obtained by both holes and electrons which are caused by photons.
    Type: Grant
    Filed: April 9, 1982
    Date of Patent: October 2, 1984
    Assignee: U.S. Philips Corporation
    Inventors: Leonard J. M. Esser, Leendert J. van de Polder
  • Patent number: 4472734
    Abstract: A television pick-up arrangement comprising a solid-state picture pick-up device rows of picture pick-up elements of which are connectable to parallel inputs of two output shift registers. At a simultaneous read-out of the shift registers the registers supply at the series outputs picture signals associated with each pair of adjacent rows of picture pick-up elements. In the device the picture pick-up elements in one row are shifted in the row direction to the intermediate position relative to the elements in the other row. A color strip filter is provided having color filter strips transverse of the row direction which have a width equal to half the size in the row direction of a picture pick-up element. After the picture signal obtained from the registers are combined with the same polarity they are applied directly and via delay devices to inputs of a matrix circuit outputs of which are coupled to a change-over circuit from which color signals are obtained.
    Type: Grant
    Filed: March 25, 1982
    Date of Patent: September 18, 1984
    Assignee: U.S. Philips Corporation
    Inventors: Leendert J. van de Polder, Leonard J. M. Esser
  • Patent number: 4468684
    Abstract: A CCD includes several juxtaposed channels for hole transport and electron transport. Each channel forms a lateral boundary for an adjacent complementary channel so that high density in combination with a simple structure can be obtained. The CCD channels may include a matrix of photosensitive elements of a solid state image sensor for a camera. The invention may also be used in memory matrices and other CCD devices.
    Type: Grant
    Filed: April 5, 1982
    Date of Patent: August 28, 1984
    Assignee: U.S. Philips Corporation
    Inventors: Leonard J. M. Esser, Ludovicus G. M. Heldens
  • Patent number: 4234807
    Abstract: A ladder device comprising at least three ladder sections connected in cascade and weighting-factor adjusting means coupled to said ladder sections and which comprises first and second field effect transistors (FET) having channel regions with different predetermined length/width ratios that define a weighting factor coefficient. A further fine adjustment of the weighting factor is achieved by adjusting the gate voltages of the FETs.
    Type: Grant
    Filed: March 13, 1978
    Date of Patent: November 18, 1980
    Assignee: U.S. Philips Corporation
    Inventors: Leonard J. M. Esser, Ludovicus G. M. Heldens
  • Patent number: 4207477
    Abstract: The invention relates to a charge-coupled device in which the charge transport in the form of majority charge carriers takes place mainly via the bulk of a semiconductor layer of one conductivity type. The semiconductor layer has zones of the second conductivity type which do not have an electric contact but which are electrically biased by means of the isolation zone surrounding the semiconductor layer which can be connected to the zones by induction by means of the electrodes and forms a drain for charge carriers from the zones. In an embodiment the device is formed by a two-phase charge-coupled device in which the zones serve to obtain asymmetry in the system. In another embodiment the device is a series-parallel-series multiplex CCD in which the zones form isolation zones between the parallel lines.
    Type: Grant
    Filed: June 7, 1978
    Date of Patent: June 10, 1980
    Assignee: U.S. Philips Corporation
    Inventor: Leonard J. M. Esser