Patents by Inventor Leonard J. Schwee
Leonard J. Schwee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 5793667Abstract: Different sequences of pulses applied to three terminals of a sense amplir section in timed relation to address pulses applied to a word line of a ferroelectric memory cell, controls detection and transfer of data with respect to a selected bit line to which the sense amplifier section is connected for rapid reset following data transfer without any precharge.Type: GrantFiled: October 18, 1996Date of Patent: August 11, 1998Assignee: The United States of America as represented by the Secretary of the NavyInventor: Leonard J. Schwee
-
Patent number: 5229961Abstract: A nonvolatile random access memory array is formed by permalloy thin films patterned into "wiggle" shapes. Address lines for reading and/or writing into the memory cells are operatively connected to associated circuitry such that writing at a selected location in the array is accomplished using coincident currents. Each memory cell in the array is arranged for passage of column conducted current to effect magnetoresistance readout in conjunction with row address lines and the aforementioned associated circuitry.Type: GrantFiled: November 19, 1990Date of Patent: July 20, 1993Assignee: The United States of America as represented by the Secretary of the NavyInventor: Leonard J. Schwee
-
Patent number: 5197025Abstract: A nonvolatile random access memory is formed by thin permalloy shaped into "wiggle" patterns and magnetized to establish a plurality of memory cells arranged into an array. Magnetic domain walls are formed at apexes of the "wiggle" pattern in each memory cell after a predetermined magnetic field is applied along the hard axis of the memory cell array by magnetization so aligned. Row address lines for reading and writing into the memory cells and column address lines for writing into the memory cells are provided to conduct currents through each column of the array for magnetoresistance readout.Type: GrantFiled: November 19, 1990Date of Patent: March 23, 1993Assignee: The United States of America as represented by the Secretary of the NavyInventors: Leonard J. Schwee, Paul E. Hunter
-
Patent number: 5165087Abstract: A crosstie random access memory system for reading and/or writing, utilizing permalloy thin films patterned into "wiggle" shapes to form a plurality of memory cells in an array. Address lines for reading and/or writing into the memory cells are operative through associated circuitry for writing at selected locations in the array using coincident currents. Current passed through each column of memory cells effects magnetoresistance readout in conjunction with row address lines by means of the aforementioned associated circuitry which is arranged so as to be integrated on a single substrate with the memory array.Type: GrantFiled: November 19, 1990Date of Patent: November 17, 1992Assignee: The United States of America as represented by the Secretary of the NavyInventor: Leonard J. Schwee
-
Patent number: 5051695Abstract: A thin film vector magnetometer is configured to produce an output that ves linearly with the component of an externally applied magnetic field in the plane of a thin film chip portion thereof along a predefined sensitivity axis. The sensitivity and linear dynamic range of the thin film vector magnetometer are intimately related to each other through a bias field supplied by a bias magnet portion of the device. The bias field also defines the sensitivity axes of the magnetometer which is orthogonal to the unidirectional bias field supplied by the bias magnet.Type: GrantFiled: May 16, 1990Date of Patent: September 24, 1991Assignee: The United States of Americas as represented by the Secretary of the NavyInventors: Paul Hunter, Leonard J. Schwee
-
Patent number: 5038323Abstract: The ferroelectric capacitor in each memory cell of an array has a logically nactive electrode plate maintained at a fixed voltage level and an opposed electrode plate coupled through a switching transistor, turned on by address signals, to a bit line through which the polarization of the capacitor is logically controlled to write and store binary logic data therein which is also readout through the same bit line at a different time during a logic restoring read operation. The ferroelectric material has sufficient conductivity to maintain the electrodes at nearly equal potentials.Type: GrantFiled: March 6, 1990Date of Patent: August 6, 1991Assignee: The United States of America as represented by the Secretary of the NavyInventor: Leonard J. Schwee
-
Patent number: 4962477Abstract: An enhanced random access memory element and a process for its fabrication, herein permalloy thin films are patterned, inter alia, into a plurality of geminous memory cells to form a matrix or array of juxtaposed sloped columns thereof is disclosed. Each of the geminous memory cells is configured into a unique pattern comprising twin sub-patterns joined in an opposite fashion, i.e. reversed and inversed, so as to share a common area of permalloy. Consequently, magnetic domain walls (Neel walls) are formed at opposite and adjacent apexes of the unique pattern parallel to the easy axis after a predetermined magnetic field is applied along the hard axis of the array of geminous memory cells and then reduced to zero. In this way, the magnetization is properly aligned for use of the array of geminous memory cells as an enhanced nonvolatile random access memory element.Type: GrantFiled: June 20, 1983Date of Patent: October 9, 1990Assignee: The United States of America as represented by the Secretary of the NavyInventor: Leonard J. Schwee
-
Patent number: 4954216Abstract: A thin film vector magnetometer is configured to produce an output that varies linearly with the component of an externally applied magnetic field in the plane of a thin film chip portion thereof along a predefined sensitivity axis. The sensitivity and linear dynamic range of the thin film vector magnetometer are intimately related to each other through a bias field supplied by a bias magnet portion of the device. The bias field also defines the sensitivity axis of the magnetometer which is orthogonal to the unidirectional bias field applied by the bias magnet.Type: GrantFiled: December 26, 1989Date of Patent: September 4, 1990Assignee: The United States of America as represented by the Secretary of the NavyInventors: Paul Hunter, Leonard J. Schwee
-
Patent number: 4901278Abstract: The present invention relates to a Bloch-line memory element and a nonvolatile RAM memory using such a Bloch-line memory element. The Bloch-line memory element comprises a planar magnetic memory element having magnetic domains separated by a wall which contains a Bloch-line disposed within the individual memory element. Coincident write lines interact with the magnetic element for writing a Bloch-line to a predetermined area within the memory element. For sensing the presence or absence of a Bloch-line within the predetermined area, one write conductor and a sense line are used for determining the logic state of the particular memory element. A plurality of memory elements are disposed in an address matrix and can be selected for reading from or writing to the particular Bloch-line RAM memory element for determining or writing bits of words.Type: GrantFiled: May 28, 1987Date of Patent: February 13, 1990Assignee: The United States of America as represented by the Secretary of the NavyInventor: Leonard J. Schwee
-
Patent number: 4301418Abstract: A process and a small, sensitive, low noise, high gain, power amplifier used in the process, for exploiting the anisotropic magnetoresistance effect in a ferromagnetic thin-film. The magnetization of the thin-film is biased to lie along the hard axis. The amplifier is configured so that a sensing current in the thin-film flows at an angle of forty-five degrees to the nominal direction of magnetization, and the current to be amplified produces a magnetic field parallel to the easy axis of the thin-film.Type: GrantFiled: September 13, 1978Date of Patent: November 17, 1981Assignee: The United States of America as represented by the Secretary of the NavyInventors: Daniel I. Gordon, Leonard J. Schwee, Wallace E. Anderson
-
Patent number: 4231107Abstract: A magnetic crosstie memory using a plurality of Permalloy thin-film strips of uniform thicknesses having parallel denticulated margins etched to align with the oblong axis of the strip. Each pair of opposite denticles defines a distinct memory cell. Magnetization relaxes upon removal of a magnetic field applied normal to the oblong axis of the thin-film with each component assuming that orientation requiring the least rotation for parallel alignment with the least distant edge. Two domains are thus formed with a domain wall suitable for storage and propagation of binary information centered between the margins and extending the length of the strip. Crossties form at the necks of the serrations and Bloch lines are positioned in potential wells between the necks. Binary information, represented by the crosstie and Bloch lines in various conventions is propagated along the domain wall from cell to cell by particular sequences of magnetic pulses.Type: GrantFiled: February 14, 1978Date of Patent: October 28, 1980Assignee: The United States of America as represented by the Secretary of the NavyInventors: Leonard J. Schwee, Henry R. Irons, Wallace E. Anderson
-
Patent number: 4199819Abstract: A symmetric narrow-wide electrical conductor for propagating binary information represented by Bloch line - crosstie pairs along a serriform crosstie thin magnetic film strip. Another conductor is made with alternate segments disposed upon opposite surfaces of the crosstie strip.Type: GrantFiled: November 8, 1978Date of Patent: April 22, 1980Assignee: The United States of America as represented by the Secretary of the NavyInventors: Leonard J. Schwee, Wallace E. Anderson, Yuan-Jye Liu, Ronald N. Lee
-
Patent number: 4192012Abstract: A magnetoresistance detector linearly stretching single bits of binary inmation such as those represented by Bloch line - crosstie pairs, along the major dimension of a thin magnetic film strip such as a serriform crosstie memory. The detector circuit is overlaid upon the thin magnetic film strip. In a selected area, less pronounced serrations in the adjacent margins, in conjunction with a magnetic field created by current through the detector circuit enable Bloch lines entering the area to travel farther. A series of oriented open segments in the overlain section of the detector circuit, arranged in symmetric correspondence with serrations in the adjacent margins, enhances the difference between logical zero and one signals in the detector circuit.Type: GrantFiled: November 8, 1978Date of Patent: March 4, 1980Assignee: The United States of America as represented by the Secretary of the NavyInventors: Leonard J. Schwee, Wallace E. Anderson, Yuan-Jye Liu, Ronald N. Lee
-
Patent number: 4100609Abstract: A detector for non-destructive sensing of binary information at a selected location along a domain wall of a thin magnetic film strip. Voltages are applied across a set of contacts arranged along the margin of the strip and the value of the voltage measured at an arranged, centered contact indicates the presence or absence of a Bloch line-crosstie pair at that location.Type: GrantFiled: September 3, 1976Date of Patent: July 11, 1978Assignee: The United States of America as represented by the Secretary of the NavyInventors: Leonard J. Schwee, Henry R. Irons, Wallace F. Anderson, Kurt Peter Scharnhorst, Albert D. Krall
-
Patent number: RE34370Abstract: The present invention relates to a Bloch-line memory element and a nonvolatile RAM memory using such a Bloch-line memory element. The Bloch-line memory element comprises a planar magnetic memory element having magnetic domains separated by a wall which contains a Bloch-line disposed within the individual memory element. Coincident write lines interact with the magnetic element for writing a Bloch-line to a predetermined area within the memory element. For sensing the presence or absence of a Bloch-line within the predetermined area, one write conductor and a sense line are used for determining the logic state of the particular memory element. A plurality of memory elements are disposed in an address matrix and can be selected for reading from or writing to the particular Bloch-line RAM memory element for determining or writing bits of words.Type: GrantFiled: February 8, 1991Date of Patent: September 7, 1993Assignee: The United States of America as represented by the Secretary of the NavyInventor: Leonard J. Schwee