Patents by Inventor Leonard W. Helmer, Jr.
Leonard W. Helmer, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10616115Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A single link interface communicatively couples the send component to the receive component. The single link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: GrantFiled: November 1, 2017Date of Patent: April 7, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, Jr., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Patent number: 9923824Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A link interface communicatively couples the send component to the receive component. The link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: GrantFiled: September 26, 2017Date of Patent: March 20, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, Jr., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Publication number: 20180054387Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A single link interface communicatively couples the send component to the receive component. The single link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: ApplicationFiled: November 1, 2017Publication date: February 22, 2018Inventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, JR., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Publication number: 20180006947Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A link interface communicatively couples the send component to the receive component. The link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: ApplicationFiled: September 26, 2017Publication date: January 4, 2018Inventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, JR., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Patent number: 9843518Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A link interface communicatively couples the send component to the receive component. The link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: GrantFiled: March 14, 2014Date of Patent: December 12, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, Jr., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Patent number: 9794178Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A link interface communicatively couples the send component to the receive component. The link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: GrantFiled: March 14, 2017Date of Patent: October 17, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, Jr., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Publication number: 20170187626Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A link interface communicatively couples the send component to the receive component. The link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: ApplicationFiled: March 14, 2017Publication date: June 29, 2017Inventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, JR., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Patent number: 9628388Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A link interface communicatively couples the send component to the receive component. The link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: GrantFiled: March 8, 2016Date of Patent: April 18, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, Jr., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Publication number: 20160173380Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A link interface communicatively couples the send component to the receive component. The link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: ApplicationFiled: March 8, 2016Publication date: June 16, 2016Inventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, JR., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Publication number: 20150263956Abstract: Embodiments are directed to a computer system for managing data transfer. The computer system includes a memory, a processor communicatively coupled to the memory, a send component and a receive component having a message queue and a controller. A link interface communicatively couples the send component to the receive component. The link interface includes a mainline channel and a sideband channel, and the computer system is configured to perform a method. The method includes transmitting mainline channel messages over the mainline channel from the send component to the receive component. The method further includes transmitting sideband channel messages over the sideband channel from the send component to the message queue of the receive component. The method further includes utilizing the controller to control a flow of the sideband channel messages to the message queue without relying on sending feedback to the send component about the flow.Type: ApplicationFiled: March 14, 2014Publication date: September 17, 2015Applicant: International Business Machines CorporationInventors: Richard K. Errickson, Thomas A. Gregg, Leonard W. Helmer, JR., Michael P. Lyons, Kulwant M. Pandey, Peter K. Szwed
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Patent number: 8432793Abstract: A computer program product, apparatus and method for managing recovery of a link in a multi-tasking multi-processor environment. An exemplary embodiment includes shutting off timers for a failed channel associated with the communications link, storing a loss of link condition in a data structure, disabling communications on the failed channel and sending an external notification of the loss of link condition.Type: GrantFiled: March 19, 2008Date of Patent: April 30, 2013Assignee: International Business Machines CorporationInventors: Richard K. Errickson, Leonard W. Helmer, Jr., John S. Houston
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Patent number: 8429662Abstract: A computer program product for passing initiative in a multitasking multiprocessor environment includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes writing a request to process a resource of the environment to an associated resource control block, setting a resource flag in a central bit vector, the resource flag indicating that a request for processing has been received for the resource, and setting a target processor initiative flag in the environment, the target processor initiative flag indicating a pass of initiative to a target processor responsible for the resource.Type: GrantFiled: March 28, 2008Date of Patent: April 23, 2013Assignee: International Business Machines CorporationInventors: Leonard W. Helmer, Jr., John S. Houston, Ambrose A. Verdibello, Jr.
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Patent number: 8364849Abstract: In a multinode data processing system in which the nodes communicate with one another via communication adapters over a network or switch, the adapters are provided with a dual register mechanism for tracking microcode task status. Upon the issuance of a disruptive command that requires attention from one of the nodes, the task status maintained in one register is copied to the snapshot register. As tasks within the adapter are completed, both registers are updated, thus providing a mechanism for the nodes to determine that all tasks active at the time of the disruptive command have completed. This means that the nodes now have a mechanism for determining, as soon as possible, that all tasks that are active when a disruptive command occurs have completed, thus allowing the data processing node to perform such operations as releasing system memory that is associated with the disruptive command, thus eliminating temporal overhead that can affect performance.Type: GrantFiled: December 20, 2004Date of Patent: January 29, 2013Assignee: International Business Machines CorporationInventors: Piyush Chaudhary, Jason E. Goscinski, Rama K. Govindaraju, Leonard W. Helmer, Jr., Peter H. Hochschild, Deryck X. Hong, John S. Houston, Jang-Soo Lee, Steven J. Martin, Yuqing Zhu
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Patent number: 8225280Abstract: A computer program product for incorporating state machine controls into existing non-state machine environments includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes determining a state machine representation for an existing environment, assigning state indicators to each state of the state machine, transcoding existing software flags of the environment into modifier values associated with the state indicators, assigning state values based on the modifier values and the state indicators, assigning event identifiers for transitions from the state values, and creating a tabular representation of the determined state machine, the tabular representation providing next state information based on the event identifiers and the state values.Type: GrantFiled: March 28, 2008Date of Patent: July 17, 2012Assignee: International Business Machines CorporationInventors: Richard K. Errickson, Leonard W. Helmer, Jr., John S. Houston, R. Timothy Tomaselli, Ambrose A. Verdibello, Jr.
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Patent number: 8023417Abstract: In remote direct memory access transfers in a multinode data processing system in which the nodes communicate with one another through communication adapters coupled to a switch or network, failures in the nodes or in the communication adapters can produce the phenomenon known as trickle traffic, which is data that has been received from the switch or from the network that is stale but which may have all the signatures of a valid packet data. The present invention addresses the trickle traffic problem in two situations: node failure and adapter failure. In the node failure situation randomly generated keys are used to reestablish connections to the adapter while providing a mechanism for the recognition of stale packets. In the adapter failure situation, a round robin context allocation approach is used with adapter state contexts being provided with state information which helps to identify stale packets.Type: GrantFiled: December 20, 2004Date of Patent: September 20, 2011Assignee: International Business Machines CorporationInventors: Robert S. Blackmore, Fu Chung Chang, Piyush Chaudhary, Jason E. Goscinski, Rama K. Govindaraju, Leonard W. Helmer, Jr., Peter H. Hochschild, John S. Houston, Steven J. Martin, Donald G. Grice
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Patent number: 7895462Abstract: A computer program product, apparatus and method for managing recovery and control of a communications link via out-of-band signaling. An exemplary embodiment includes sending a command, sending an invalidate request to a buffer associated with the command and receiving a response to the invalidate request at least one of prior to the command reaching the recipient and after the command reaching the recipient.Type: GrantFiled: March 19, 2008Date of Patent: February 22, 2011Assignee: International Business Machines CorporationInventors: Richard K. Errickson, Leonard W. Helmer, Jr., John S. Houston
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Patent number: 7813369Abstract: In a multinode data processing system in which nodes exchange information over a network or through a switch, a structure and mechanism is provided within the realm of Remote Direct Memory Access (RDMA) operations in which DMA operations are present on one side of the transfer but not the other. On the side in which the transfer is not carried out in DMA fashion, transfer processing is carried out under program control; this is in contrast to the transfer on the DMA side which is characteristically carried out in hardware. Usage of these combination processes is useful in programming situations where RDMA is carried out to or from contiguous locations in memory on one side and where memory locations on the other side is noncontiguous. This split mode of transfer is provided both for read and for write operations.Type: GrantFiled: December 20, 2004Date of Patent: October 12, 2010Assignee: International Business Machines CorporationInventors: Robert S. Blackmore, Fu Chung Chang, Piyush Chaudhary, Kevin J. Gildea, Jason E. Goscinski, Rama K. Govindaraju, Donald G. Grice, Leonard W. Helmer, Jr., Patricia E. Heywood, Peter H. Hochschild, John S. Houston, Chulho Kim, Steven J. Martin
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Publication number: 20090216927Abstract: A computer program product, apparatus and method for managing recovery and control of a communications link via out-of-band signaling. An exemplary embodiment includes sending a command, sending an invalidate request to a buffer associated with the command and receiving a response to the invalidate request at least one of prior to the command reaching the recipient and after the command reaching the recipient.Type: ApplicationFiled: March 19, 2008Publication date: August 27, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard K. Errickson, Leonard W. Helmer, JR., John S. Houston
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Publication number: 20090217284Abstract: A computer program product for passing initiative in a multitasking multiprocessor environment includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes writing a request to process a resource of the environment to an associated resource control block, setting a resource flag in a central bit vector, the resource flag indicating that a request for processing has been received for the resource, and setting a target processor initiative flag in the environment, the target processor initiative flag indicating a pass of initiative to a target processor responsible for the resource.Type: ApplicationFiled: March 28, 2008Publication date: August 27, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Leonard W. Helmer, JR., John S. Houston, Ambrose A. Verdibello, JR.
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Publication number: 20090217238Abstract: A computer program product for incorporating state machine controls into existing non-state machine environments includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes determining a state machine representation for an existing environment, assigning state indicators to each state of the state machine, transcoding existing software flags of the environment into modifier values associated with the state indicators, assigning state values based on the modifier values and the state indicators, assigning event identifiers for transitions from the state values, and creating a tabular representation of the determined state machine, the tabular representation providing next state information based on the event identifiers and the state values.Type: ApplicationFiled: March 28, 2008Publication date: August 27, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard K. Errickson, Leonard W. Helmer, JR., John S. Houston, R. Timothy Tomaselli, Ambrose A. Verdibello, JR.