Abstract: The circuit arrangement has a sigma-delta converter (2) for converting an analog input signal into a digital output signal. The sigma-delta converter (2) contains a loop filter, a comparator connected downstream of the latter and a feedback loop to feed the output signal back to the input signal. To reduce idle tones a dither signal is fed to the comparator by means of a dither-signal line (27.1). The dither signal is not however generated by a complex dither-signal generator. Instead, what is used as a dither signal is a signal that is available in the circuit but is not specifically generated for this purpose, e.g. an output signal from a second sigma-delta converter (2?). The circuit arrangement is thus simpler and less expensive than conventional circuit arrangements without its reduction of idle tones suffering.

Abstract: The circuit arrangement has a sigma-delta converter (2) for converting an analog input signal into a digital output signal. The sigma-delta converter (2) contains a loop filter, a comparator connected downstream of the latter and a feedback loop to feed the output signal back to the input signal. To reduce idle tones a dither signal is fed to the comparator by means of a dither-signal line (27.1). The dither signal is not however generated by a complex dither-signal generator. Instead, what is used as a dither signal is a signal that is available in the circuit but is not specifically generated for this purpose, e.g. an output signal from a second sigma-delta converter (2?). The circuit arrangement is thus simpler and less expensive than conventional circuit arrangements without its reduction of idle tones suffering.