Patents by Inventor Leonardo Perillo

Leonardo Perillo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6356061
    Abstract: The present invention includes a linear regulator with a Darlington bipolar output stage. The linear regulator includes a starting circuit, an output stage, and a reference voltage generator connected to a control loop. The starting circuit has output terminals connected to current sources and an input terminal connected to an input reference terminal of the linear regulator via a transistor of the PNP-type. The output stage includes two Darlington-connected transistors. The reference voltage generator supplies a voltage value approximately equal to the chosen output voltage value of the linear regulator. The control loop is configured as a voltage follower, which receives a reference voltage value from the reference voltage generator.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: March 12, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventor: Leonardo Perillo
  • Patent number: 5764460
    Abstract: A circuit for protecting from overload currents includes an electronic power device having at least first and second terminals and at least one control terminal. The circuit also includes at least one voltage-generating circuit for generating a reference voltage having a predetermined pattern. The voltage-generating circuit includes at least a first terminal connected to the first terminal of the power device and at least a second terminal coupled to the second terminal of the power device through a sensor. The circuit also preferably includes at least one comparator for comparing the reference voltage with a voltage present across the sensor. The comparator has at least one output terminal and at least first and second input terminals. The first and second input terminals are respectively connected to a third terminal of the voltage-generating circuit and the second terminal of the power device.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: June 9, 1998
    Assignee: Co.Ri.M.Me-Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Leonardo Perillo, Giuseppe Scilla