Patents by Inventor Leonardo Rub
Leonardo Rub has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11074032Abstract: A multi-core audio processor includes a data protocol interface configured to receive a stream of audio data, a plurality of data processing cores including a single sample processing core and a block data processing core, an audio fabric block configured to route samples of the stream between the data protocol interface and the plurality of data processing cores. The single sample processing core includes an execution unit configured to execute one or more low latency instructions for performing computations for the samples.Type: GrantFiled: September 24, 2018Date of Patent: July 27, 2021Assignee: Knowles Electronics, LLCInventors: Leonardo Rub, Brian Clark
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Patent number: 10908880Abstract: An integrated circuit for processing audio signals from a microphone assembly, combinations thereof and methods therefor, including a multi-issue processor configured to execute multiple instructions concurrently and connectable to a memory with a plurality of locations each represented by a corresponding index. Bit-reversal is performed on a sequence of audio data bits stored in memory by concurrently performing a load or store operation related to a first index and determining whether to perform a load operation for a second index.Type: GrantFiled: October 18, 2019Date of Patent: February 2, 2021Assignee: Knowles Electronics, LLCInventor: Leonardo Rub
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Publication number: 20200278824Abstract: A multi-core audio processor includes a data protocol interface configured to receive a stream of audio data, a plurality of data processing cores including a single sample processing core and a block data processing core, an audio fabric block configured to route samples of the stream between the data protocol interface and the plurality of data processing cores. The single sample processing core includes an execution unit configured to execute one or more low latency instructions for performing computations for the samples.Type: ApplicationFiled: September 24, 2018Publication date: September 3, 2020Applicant: KNOWLES ELECTRONICS, LLCInventors: Leonardo RUB, Brian CLARK
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Publication number: 20200125334Abstract: An integrated circuit for processing audio signals from a microphone assembly, combinations thereof and methods therefor, including a multi-issue processor configured to execute multiple instructions concurrently and connectable to a memory with a plurality of locations each represented by a corresponding index. Bit-reversal is performed on a sequence of audio data bits stored in memory by concurrently performing a load or store operation related to a first index and determining whether to perform a load operation for a second index.Type: ApplicationFiled: October 18, 2019Publication date: April 23, 2020Applicant: KNOWLES ELECTRONICS, LLCInventor: Leonardo Rub
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Patent number: 10311127Abstract: Systems and methods for multiplying a sparse matrix by a vector using a single instruction multiple data (SIMD) architecture are provided. An example method includes sorting rows of the sparse matrix by a number of non-zero elements in the rows to generate sorted rows. The sorted rows are split to generate groups of the sorted rows. The number of rows in each group of the sorted rows is equal to the number of rows updated in parallel. The method allows for packing the sorted rows in each of the groups to generate packed rows. Each of the packed rows within the same group has the same length. Per clock cycle, C elements of the packed rows and data for selecting elements of the vector are provided to computational units in the SIMD architecture, where C is the number of computational units.Type: GrantFiled: October 27, 2017Date of Patent: June 4, 2019Assignee: Knowles Electronics, LLCInventor: Leonardo Rub
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Publication number: 20180067899Abstract: Systems and methods for multiplying a sparse matrix by a vector using a single instruction multiple data (SIMD) architecture are provided. An example method includes sorting rows of the sparse matrix by a number of non-zero elements in the rows to generate sorted rows. The sorted rows are split to generate groups of the sorted rows. The number of rows in each group of the sorted rows is equal to the number of rows updated in parallel. The method allows for packing the sorted rows in each of the groups to generate packed rows. Each of the packed rows within the same group has the same length. Per clock cycle, C elements of the packed rows and data for selecting elements of the vector are provided to computational units in the SIMD architecture, where C is the number of computational units.Type: ApplicationFiled: October 27, 2017Publication date: March 8, 2018Applicant: Knowles Electronics, LLCInventor: Leonardo Rub
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Patent number: 9830302Abstract: Systems and methods for multiplying a sparse matrix by a vector using a single instruction multiple data (SIMD) architecture are provided. An example method includes sorting rows of the sparse matrix by a number of non-zero elements in the rows to generate sorted rows. The sorted rows are split to generate groups of the sorted rows. The number of rows in each group of the sorted rows is equal to the number of rows updated in parallel. The method allows for packing the sorted rows in each of the groups to generate packed rows. Each of the packed rows within the same group has the same length. Per clock cycle, C elements of the packed rows and data for selecting elements of the vector are provided to computational units in the SIMD architecture, where C is the number of computational units.Type: GrantFiled: April 13, 2015Date of Patent: November 28, 2017Assignee: Knowles Electronics, LLCInventor: Leonardo Rub
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Patent number: 9104510Abstract: Arithmetic units and methods for floating point processing are provided. In exemplary embodiments, data paths to and from multiple multipliers and adders are flexibly combined through crossbars and alignment units to allow a wide range of mathematical operations, including affine and SIMD operations. The micro-architecture for a high-performance flexible vector floating point arithmetic unit is provided, which can perform a single-cycle throughput complex multiply-and-accumulate operation, as well as a Fast Fourier Transform (radix-2 decimation-in-time) Butterfly operation.Type: GrantFiled: April 30, 2010Date of Patent: August 11, 2015Assignee: Audience, Inc.Inventors: Leonardo Rub, Dana Massie, Samuel Dicker
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Patent number: 8618961Abstract: Digital methods and systems for signal processing and filtering are provided. The methods and corresponding systems provide asynchronous conversion of sampling rate frequencies and utilize advanced multistage phasor filters for converting an input signal having a first sampling rate into an output signal sampled in an arbitrary sequence of sampling times. The conversion process provides a sequence of sets of complex numbers representing a filtered version of the input signal. More specifically, the conversion process includes the calculation of values of the output signal by multiplying (e.g., scaling) the sets of complex numbers by a corresponding set of complex phasors, the complex phasors corresponding to the timing of the arbitrary time sequence to obtain a corresponding set of real results with the value of the output signal being the sum of the real results.Type: GrantFiled: March 12, 2013Date of Patent: December 31, 2013Assignee: Audience, Inc.Inventors: Dana Massie, David P. Rossum, Brian Clark, Leonardo Rub, Jean Laroche
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Publication number: 20050283394Abstract: A user in an identified adoption group is periodically queried regarding use of a product. Results of the querying are received and evaluated. The evaluating includes aggregating the results by category, computing a proportion of total results for each category, and generating a first user emphasis vector based on the proportion of total results for each category. Based on the evaluating, a determination is made whether to incorporate the results of the querying into a representative result for an evaluation group.Type: ApplicationFiled: May 12, 2005Publication date: December 22, 2005Inventors: Justin McGloin, Patricia McGloin, Leonardo Rub
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Patent number: 6539078Abstract: A system and method for speech-responsive voice messaging, in which a Speech-Responsive Voice Messaging System (SRVMS) preferably provides a hierarchically-simple speech user interface (UI) that enables subscribers to use speech to specify commands such as mailboxes, passwords, and digits. The SRVMS generates and evaluates candidate results. The SRVMS invokes a speech UI navigation operation or a voice messaging operation according to the outcome of the evaluation of the candidate results. In the preferred embodiment, the SRVMS determines whether the candidate results are good, questionable, or bad; and whether two or more candidate results are ambiguous due to a likelihood that each such result could be a valid command. If the candidate results are questionable or ambiguous, an ambiguity resolution UI prompts the subscriber to confirm whether the best candidate result is what the subscriber intended.Type: GrantFiled: February 14, 2000Date of Patent: March 25, 2003Assignee: Avaya Technology CorporationInventors: Peter Hunt, Susannah Albright, Kamil Grajski, Leonardo Rub
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Patent number: 6522726Abstract: A system and method for speech-responsive voice messaging, in which a Speech-Responsive Voice Messaging System (SRVMS) preferably provides a hierarchically-simple speech user interface (UI) that enables subscribers to use speech to specify commands such as mailboxes, passwords, and digits. The SRVMS generates and evaluates candidate results. The SRVMS invokes a speech UI navigation operation or a voice messaging operation according to the outcome of the evaluation of the candidate results. In the preferred embodiment, the SRVMS determines whether the candidate results are good, questionable, or bad; and whether two or more candidate results are ambiguous due to a likelihood that each such result could be a valid command. If the candidate results are questionable or ambiguous, an ambiguity resolution UI prompts the subscriber to confirm whether the best candidate result is what the subscriber intended.Type: GrantFiled: February 14, 2000Date of Patent: February 18, 2003Assignee: Avaya Technology Corp.Inventors: Peter Hunt, Susannah Albright, Kamil Grajski, Leonardo Rub
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Patent number: 6385304Abstract: A system and method for speech-responsive voice messaging, in which a Speech-Responsive Voice Messaging System (SRVMS) preferably provides a hierarchically-simple speech user interface (UI) that enables subscribers to use speech to specify commands such as mailboxes, passwords, and digits. The SRVMS generates and evaluates candidate results. The SRVMS invokes a speech UI navigation operation or a voice messaging operation according to the outcome of the evaluation of the candidate results. In the preferred embodiment, the SRVMS determines whether the candidate results are good, questionable, or bad; and whether two or more candidate results are ambiguous due to a likelihood that each such result could be a valid command. If the candidate results are questionable or ambiguous, an ambiguity resolution UI prompts the subscriber to confirm whether the best candidate result is what the subscriber intended.Type: GrantFiled: February 14, 2000Date of Patent: May 7, 2002Assignee: Avaya Technology Corp.Inventors: Peter Hunt, Susannah Albright, Kamil Grajski, Leonardo Rub
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Patent number: 6377662Abstract: A system and method for speech-responsive voice messaging, in which a Speech-Responsive Voice Messaging System (SRVMS) preferably provides a hierarchically-simple speech user interface (UI) that enables subscribers to use speech to specify commands such as mailboxes, passwords, and digits. The SRVMS generates and evaluates candidate results. The SRVMS invokes a speech UI navigation operation or a voice messaging operation according to the outcome of the evaluation of the candidate results. In the preferred embodiment, the SRVMS determines whether the candidate results are good, questionable, or bad; and whether two or more candidate results are ambiguous due to a likelihood that each such result could be a valid command. If the candidate results are questionable or ambiguous, an ambiguity resolution UI prompts the subscriber to confirm whether the best candidate result is what the subscriber intended.Type: GrantFiled: February 14, 2000Date of Patent: April 23, 2002Assignee: Avaya Technology Corp.Inventors: Peter Hunt, Susannah Albright, Kamil Grajski, Leonardo Rub
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Patent number: 6094476Abstract: A system and method for speech-responsive voice messaging, in which a Speech-Responsive Voice Messaging System (SRVMS) preferably provides a hierarchically-simple speech user interface (UI) that enables subscribers to use speech to specify commands such as mailboxes, passwords, and digits. The SRVMS generates and evaluates candidate results. The SRVMS invokes a speech UI navigation operation or a voice messaging operation according to the outcome of the evaluation of the candidate results. In the preferred embodiment, the SRVMS determines whether the candidate results are good, questionable, or bad; and whether two or more candidate results are ambiguous due to a likelihood that each such result could be a valid command. If the candidate results are questionable or ambiguous, an ambiguity resolution UI prompts the subscriber to confirm whether the best candidate result is what the subscriber intended.Type: GrantFiled: March 24, 1997Date of Patent: July 25, 2000Assignee: Octel Communications CorporationInventors: Peter Hunt, Susannah Albright, Kamil Grajski, Leonardo Rub