Patents by Inventor Leonardus Cornelis Nicolaas De Vreede
Leonardus Cornelis Nicolaas De Vreede has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11996839Abstract: An RF transmitter having one or more common-gate, CG, or common-base, CB, configured output stages, and a digitally controlled current source having a plurality of unit cells connected to the output stages, each of the plurality of unit cells comprising a current source. The digitally controlled current source is configured for driving the output stages with respective driving currents originating from the associated current source in each of the plurality of unit cells, in dependence of one or more input signals. The digitally controlled current source further comprises a current diversion path in each of the plurality of unit cells for providing a diversion current to a voltage source having a voltage lower than drain/collector terminals of transistors provided in the CG/CB configured output stages.Type: GrantFiled: March 19, 2021Date of Patent: May 28, 2024Assignee: Technische Universiteit DelftInventors: Leonardus Cornelis Nicolaas De Vreede, Yiyu Shen, Seyed Morteza Alavi
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Publication number: 20240146503Abstract: Digitally controlled segmented RF power transmitter with a digital processing part (2) and an RF power amplification part (3) having a plurality of segments (122). The digital processing part (2) has a clock generation block (5) being arranged to generate n equi-phased clock signals with a 50% duty-cycle (fLO,x_50%; Cx), and a sign-bit phase mapper unit (11) being arranged to receive the n equi-phased clock signals (fLO,x_50%; Cx), and sign signals (SignI, SignQ; sign bits), and to output a set of m, m?n, phase mapped clock signals with a 50% duty-cycle (CLKy,50%; Cy) using a predetermined phase swapping scheme. Each of the plurality of segments (122) comprises logic circuitry (12) receiving the set of m phase-mapped clock signals with a 50% duty-cycle (CLKy,50%; Cy), and being arranged to provide the respective segment driving signal with a duty-cycle z of less than 50%.Type: ApplicationFiled: February 4, 2022Publication date: May 2, 2024Applicant: Technische Universiteit DelftInventors: Mohammad Reza Beikmirza, Leonardus Cornelis Nicolaas de Vreede, Robert Jan Bootsman, Dieuwert Peter Nicolaas Mul, Seyed Morteza Alavi, Yiyu Shen
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Publication number: 20240146346Abstract: A method of applying an activation scheme to a digitally controlled segmented RF power transmitter having a plurality of adjacent segments (3), each segment (3) having an associated activation area, the segments (3) being controlled by one or more code words (CWD) The method includes controlling segments (3) by activating a specific segment (3) using an activation scheme for activating specific ones of the segments (3) depending on the code word (CWD), the activation scheme starting from center ones of the plurality of segments (3) towards outer ones of the plurality of segments (3) for increasing code word (CWD) values. This method can be applied in any digitally controlled segmented RF power transmitter, be it in polar or Cartesian implementations, and in single ended or push-pull output configurations.Type: ApplicationFiled: February 4, 2022Publication date: May 2, 2024Applicant: TECHNISCHE UNIVERSITEIT DELFTInventors: Dieuwert Peter Nicolaas Mul, Robert Jan Bootsman, Mohammad Reza Beikmirza, Seyed Morteza Alavi, Leonardus Cornelis Nicolaas de Vreede
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Publication number: 20240106396Abstract: The present invention relates to a push-pull amplifying unit and a Doherty amplifier. The push-pull amplifying unit comprises a first amplifier, a second amplifier, a first shunt inductor, and a second shunt inductor. The first and second shunt inductors have mutually connected second terminals and are inductively coupled to increase the impedance between the first output and the virtual ground and the impedance between the second output and the virtual ground at a fundamental frequency of a signal to be amplified by the push-pull amplifying unit relative to those impedances in the absence of said inductive coupling, and to decrease the impedance between the first output and the virtual ground and the impedance between the second output and the virtual ground at a second harmonic frequency of the signal to be amplified relative to those impedances in the absence of said inductive coupling.Type: ApplicationFiled: February 4, 2022Publication date: March 28, 2024Inventors: Mohammad Reza BEIKMIRZA, Seyed Morteza ALAVI, Leonardus Cornelis Nicolaas DE VREEDE, Freerk VAN RIJS, Radjindrepersad GAJADHARSING
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Publication number: 20230143414Abstract: An RF transmitter having one or more common-gate, CG, or common-base, CB, configured output stages, and a digitally controlled current source having a plurality of unit cells connected to the output stages, each of the plurality of unit cells comprising a current source. The digitally controlled current source is configured for driving the output stages with respective driving currents originating from the associated current source in each of the plurality of unit cells, in dependence of one or more input signals. The digitally controlled current source further comprises a current diversion path in each of the plurality of unit cells for providing a diversion current to a voltage source having a voltage lower than drain/collector terminals of transistors provided in the CG/CB configured output stages.Type: ApplicationFiled: March 19, 2021Publication date: May 11, 2023Applicant: Technische Universiteit DelftInventors: Leonardus Cornelis Nicolaas De Vreede, Yiyu Shen, Seyed Morteza Alavi
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Publication number: 20230139209Abstract: An RF transmitter (1) having a gate-segmented power output stage (2) and a digital driver (5). The gate-segmented power output stage (2) includes a field-effect transistor with a plurality of gate fingers (32) and drain fingers (31) that define a gate periphery. The field-effect transistor comprises a plurality of power output stage segments (3) that each correspond to a respective part of the gate periphery, and that each have a respective power output stage segment input (4). The digital driver (5) has control outputs (6) which are connected to corresponding ones of the respective power output stage segment inputs (4), and is configured for individually switching each of the power output stage segments (3) between an on mode and a cut-off mode in dependence of one or more input signals to obtain a modulated RF carrier signal at an output (7) of the gate-segmented power output stage (2).Type: ApplicationFiled: February 5, 2021Publication date: May 4, 2023Applicant: Technische Universiteit DelftInventors: Leonardus Cornelis Nicolaas de Vreede, Seyed Morteza Alavi, Robert Jan Bootsman, Mohammad Reza Beikmirza, Dieuwert Peter Nicolaas Mul, Rob Heeres, Freerk van Rijs
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Patent number: 10892935Abstract: A wideband, linear, direct-digital RF modulator (DDRM) for a digitally-intensive transmitter (DTX) includes an interpolation filter and an in-phase/quadrature (I/Q)-interleaving RF digital-to-analog converter (RF-DAC). The interpolation filter suppresses sampling replicas in the DDRM's output RF spectrum. I/Q interleaving performed by the interleaving RF-DAC avoids problems associated with using two separate I- and Q-path RF-DACs. Each unit cell of the interleaving RF-DAC is capable of producing four unique non-overlapping waveforms covering all four quadrants of the I/Q signal plane. In one embodiment of the invention, the interleaving RF-DAC includes three parallel-connected RF-DACs operating in accordance with a multi-phase set of LO clocks to both cancel 3rd-order and 5th-order LO harmonics generated by the RF-DAC unit cells' interleaving logic and prevent 3rd-order intermodulation from occurring in the DTX's final stage RF power amplifier.Type: GrantFiled: May 30, 2018Date of Patent: January 12, 2021Assignee: Technische Universiteit DelftInventors: Mohammed Reza Mehrpoo, Leonardus Cornelis Nicolaas de Vreede, Seyed Morteza Alavi
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Patent number: 10819379Abstract: A digitally-controlled power amplifier (DPA) includes a radio frequency digital-to-analog converter (RF-DAC) constructed from nonlinearly weighted PA segments, a multiphase RF drive signal generator that drives the PA segments, and overdrive voltage control circuitry. The nonlinear weighting of the PA segments intrinsically compensates for amplitude-code-word dependent amplitude distortion (ACW-AM distortion) involved in the operation of the RF-DAC and the multiphase RF drive signal generator facilitates ACW-dependent phase distortion (ACW-PM distortion) reduction, thus obviating the need for complicated and efficiency-degrading digital predistortion. The overdrive voltage control circuitry is used to fine tune the RF output of the DPA and compensate for other non-idealities and external influences such as process, voltage, temperature (PVT), frequency and/or load impedance variations.Type: GrantFiled: April 15, 2020Date of Patent: October 27, 2020Assignee: Technische Universiteit DelftInventors: Mohsen Hashemi, Leonardus Cornelis Nicolaas de Vreede
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Publication number: 20200244293Abstract: A digitally-controlled power amplifier (DPA) includes a radio frequency digital-to-analog converter (RF-DAC) constructed from nonlinearly weighted PA segments, a multiphase RF drive signal generator that drives the PA segments, and overdrive voltage control circuitry. The nonlinear weighting of the PA segments intrinsically compensates for amplitude-code-word dependent amplitude distortion (ACW-AM distortion) involved in the operation of the RF-DAC and the multiphase RF drive signal generator facilitates ACW-dependent phase distortion (ACW-PM distortion) reduction, thus obviating the need for complicated and efficiency-degrading digital predistortion. The overdrive voltage control circuitry is used to fine tune the RF output of the DPA and compensate for other non-idealities and external influences such as process, voltage, temperature (PVT), frequency and/or load impedance variations.Type: ApplicationFiled: April 15, 2020Publication date: July 30, 2020Applicant: Technische Universiteit DelftInventors: Mohsen Hashemi, Leonardus Cornelis Nicolaas de Vreede
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Patent number: 10659091Abstract: A digitally-controlled power amplifier (DPA) includes a radio frequency digital-to-analog converter (RF-DAC) constructed from nonlinearly weighted PA segments, a multiphase RF drive signal generator that drives the PA segments, and overdrive voltage control circuitry. The nonlinear weighting of the PA segments intrinsically compensates for amplitude-code-word dependent amplitude distortion (ACW-AM distortion) involved in the operation of the RF-DAC and the multiphase RF drive signal generator facilitates ACW-dependent phase distortion (ACW-PM distortion) reduction, thus obviating the need for complicated and efficiency-degrading digital predistortion. The overdrive voltage control circuitry is used to fine tune the RF output of the DPA and compensate for other non-idealities and external influences such as process, voltage, temperature (PVT), frequency and/or load impedance variations.Type: GrantFiled: January 12, 2018Date of Patent: May 19, 2020Assignee: Technische Universiteit DelftInventors: Mohsen Hashemi, Leonardus Cornelis Nicolaas de Vreede
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Publication number: 20200112471Abstract: A wideband, linear, direct-digital RF modulator (DDRM) for a digitally-intensive transmitter (DTX) includes an interpolation filter and an in-phase/quadrature (I/Q)-interleaving RF digital-to-analog converter (RF-DAC). The interpolation filter suppresses sampling replicas in the DDRM's output RF spectrum. I/Q interleaving performed by the interleaving RF-DAC avoids problems associated with using two separate I- and Q-path RF-DACs. Each unit cell of the interleaving RF-DAC is capable of producing four unique non-overlapping waveforms covering all four quadrants of the I/Q signal plane. In one embodiment of the invention, the interleaving RF-DAC includes three parallel-connected RF-DACs operating in accordance with a multi-phase set of LO clocks to both cancel 3rd-order and 5th-order LO harmonics generated by the RF-DAC unit cells' interleaving logic and prevent 3rd-order intermodulation from occurring in the DTX's final stage RF power amplifier.Type: ApplicationFiled: May 30, 2018Publication date: April 9, 2020Applicant: Technische Universiteit DelftInventors: Mohammed Reza Mehrpoo, Leonardus Cornelis Nicolaas de Vreede, Seyed Morteza Alavi
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Publication number: 20190386690Abstract: A digitally-controlled power amplifier (DPA) includes a radio frequency digital-to-analog converter (RF-DAC) constructed from nonlinearly weighted PA segments, a multiphase RF drive signal generator that drives the PA segments, and overdrive voltage control circuitry. The nonlinear weighting of the PA segments intrinsically compensates for amplitude-code-word dependent amplitude distortion (ACW-AM distortion) involved in the operation of the RF-DAC and the multiphase RF drive signal generator facilitates ACW-dependent phase distortion (ACW-PM distortion) reduction, thus obviating the need for complicated and efficiency-degrading digital predistortion. The overdrive voltage control circuitry is used to fine tune the RF output of the DPA and compensate for other non-idealities and external influences such as process, voltage, temperature (PVT), frequency and/or load impedance variations.Type: ApplicationFiled: January 12, 2018Publication date: December 19, 2019Applicant: Technische Universiteit DelftInventors: Mohsen Hashemi, Leonardus Cornelis Nicolaas de Vreede
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Patent number: 10284148Abstract: An RF amplifier is described including an input, an output, a parallel arrangement of a first branch and at least one further branch, each branch comprising a bipolar transistor in a degenerative emitter configuration having a base coupled to the input, a collector coupled to a common collector node, and an emitter degeneration impedance arranged between the emitter and a common rail. The common collector node is coupled to the output, the base of the first branch bipolar transistor is biased at a first bias voltage and the base of the at least one further branch bipolar transistor is biased at a bias voltage offset from the first bias voltage. In operation of the RF amplifier a IM3 distortion current output by the first branch bipolar transistor is in antiphase to a IM3 distortion current output by the at least one further branch bipolar transistor.Type: GrantFiled: January 8, 2018Date of Patent: May 7, 2019Assignee: NXP B.V.Inventors: Marco D'Avino, Mark Pieter van der Heijden, Michel Wilhelmus Arnoldus Groenewegen, Leonardus Cornelis Nicolaas de Vreede
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Publication number: 20180198420Abstract: An RF amplifier is described including an input, an output, a parallel arrangement of a first branch and at least one further branch, each branch comprising a bipolar transistor in a degenerative emitter configuration having a base coupled to the input, a collector coupled to a common collector node, and an emitter degeneration impedance arranged between the emitter and a common rail. The common collector node is coupled to the output, the base of the first branch bipolar transistor is biased at a first bias voltage and the base of the at least one further branch bipolar transistor is biased at a bias voltage offset from the first bias voltage. In operation of the RF amplifier a IM3 distortion current output by the first branch bipolar transistor is in antiphase to a IM3 distortion current output by the at least one further branch bipolar transistor.Type: ApplicationFiled: January 8, 2018Publication date: July 12, 2018Inventors: Marco D'Avino, Mark Pieter van der Heijden, Michel Wilhelmus Arnoldus Groenewegen, Leonardus Cornelis Nicolaas de Vreede
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Patent number: 8456175Abstract: Measurement arrangement and method for active load pull measurements of a device under test (1). A wideband analog-to-digital conversion block (3) is provided for obtaining measurement data. First and second injection signal generators (7, 8) are connected to a source side and a load side of the device under test (1). This set up allows to create predetermined reflection coefficients at reference planes of the device under test (1). Injection signal parameters as determined are converted into the injection signals at the source and load side by digital-to-analog conversion. The wideband analog-to-digital conversion block (3) is further arranged for analog-to-digital conversion of the intermediate frequency signals to obtain the actual measured reflection coefficient versus frequency functions with a first frequency resolution. The first frequency resolution applied in the analog-to-digital conversion is equal to or better than a second frequency resolution applied in the digital-to-analog conversion.Type: GrantFiled: April 1, 2009Date of Patent: June 4, 2013Assignee: Anteverta-MW B.V.Inventors: Mauro Marchetti, Marco Johannes Pelk, Leonardus Cornelis Nicolaas De Vreede
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Patent number: 8022760Abstract: A 3-way Doherty amplifier has an amplifier input and an amplifier output. The amplifier has a main stage, a first peak stage and a second peak stage. The amplifier has an input network connecting the amplifier input to the inputs of the stages, and an output network connecting the stages to the amplifier output. The output network implements a phase shift of 90° between the output of the main stage and the amplifier output; a phase shift of 180° between the output of the first peak stage and the amplifier output; and a phase shift of 90° between the third output and the amplifier output.Type: GrantFiled: December 18, 2008Date of Patent: September 20, 2011Assignee: NXP B.V.Inventors: Radjindrepersad Gajadharsing, Weng Chuen Edmund Neo, Marco Johannes Pelk, Leonardus Cornelis Nicolaas De Vreede, Ji Zhao
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Publication number: 20110129037Abstract: An electronic circuit, such as a transmitter, for receiving a modulating signal including an in-phase component (I) and a quadrature component (Q). The electronic circuit has a first digital-to-RF-amplitude convertor (DRAC) receiving the in-phase component and a second digital-to-RF-amplitude convertor (DRAC) receiving the quadrature component. The first digital-to-RF-amplitude convertor is operative in a first duty cycle that is different from 50% and the second digital-to-RF-amplitude convertor is operative in a second duty cycle that is different from 50% and substantially the same in value as said first duty cycle.Type: ApplicationFiled: November 30, 2010Publication date: June 2, 2011Inventors: Bogdan Staszewski, Leonardus Cornelis Nicolaas De Vreede
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Patent number: 7923818Abstract: A varactor element having a junction region, in which the depletion capacitance of the varactor element varies when a reverse bias voltage is applied to the varactor element. The varactor element has an exponential depletion capacitance-voltage relation, e.g. obtained by providing a predetermined doping profile in the junction region. The varactor element can be used in a narrow tone spacing varactor stack arrangement, in which two varactor elements are connected in an anti-series configuration. A low impedance path for base band frequency components between a control node and each of two RF connection nodes is provided, while for fundamental and higher order harmonic frequencies, a high impedance path is provided.Type: GrantFiled: November 24, 2006Date of Patent: April 12, 2011Assignee: Technische Universiteit DelftInventor: Leonardus Cornelis Nicolaas De Vreede
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Publication number: 20080290465Abstract: A varactor element having a junction region, in which the depletion capacitance of the varactor element varies when a reverse bias voltage is applied to the varactor element. The varactor element has an exponential depletion capacitance-voltage relation, e.g. obtained by providing a predetermined doping profile in the junction region. The varactor element can be used in a narrow tone spacing varactor stack arrangement, in which two varactor elements are connected in an anti-series configuration. A low impedance path for base band frequency components between a control node and each of two RF connection nodes is provided, while for fundamental and higher order harmonic frequencies, a high impedance path is provided.Type: ApplicationFiled: November 24, 2006Publication date: November 27, 2008Applicant: TECHNISCHE UNIVERSITEIT DELFTInventor: Leonardus Cornelis Nicolaas de Vreede
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Publication number: 20080191260Abstract: The semiconductor device comprises a first and a second varactor which are connected in an anti-series configuration. This connection is done such that a first, substantially electrically conductive region is present between a second region with dopant of a first conductivity type and a third region with dopant of the first conductivity type. The second and third regions comprise dopant that is distributed uniformly within the region. The first region is provided with or connected to a contact which has an AC resistance of at least 1 k?.Type: ApplicationFiled: September 26, 2005Publication date: August 14, 2008Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Leonardus Cornelis Nicolaas De Vreede, Lis Karen Nanver, Koen Buisman