Patents by Inventor Leonardus J. van Bokhoven

Leonardus J. van Bokhoven has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10372860
    Abstract: Systems and methods are described for creating a netlist abstraction that provides full-chip context for performing circuit design floorplanning. The netlist abstraction can include a top-level netlist abstraction that corresponds to the top-level portion of the netlist, and a physical block netlist abstraction for each physical block in the circuit design. Each physical block netlist abstraction can retain macros that are in the physical block.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: August 6, 2019
    Assignee: SYNOPSYS, INC.
    Inventors: Balkrishna R. Rashingkar, Leonardus J. van Bokhoven, Peiqing Zou
  • Publication number: 20170004240
    Abstract: Systems and methods are described for creating a netlist abstraction that provides full-chip context for performing circuit design floorplanning. The netlist abstraction can include a top-level netlist abstraction that corresponds to the top-level portion of the netlist, and a physical block netlist abstraction for each physical block in the circuit design. Each physical block netlist abstraction can retain macros that are in the physical block.
    Type: Application
    Filed: July 1, 2015
    Publication date: January 5, 2017
    Applicant: SYNOPSYS, INC.
    Inventors: Balkrishna R. Rashingkar, Leonardus J. van Bokhoven, Peiqing Zou