Patents by Inventor Leonardus P. Kouwenhoven

Leonardus P. Kouwenhoven has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12178141
    Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: December 24, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven
  • Publication number: 20240373762
    Abstract: A device comprises a semiconductor-superconductor hybrid structure comprising a semiconductor component and a superconductor component, the superconductor component comprising a layer of aluminium; at least one conductive lead in tunnelling communication with the semiconductor-superconductor hybrid structure; and a tunnel barrier arranged between the semiconductor-superconductor hybrid structure and the at least one conductive lead. The conductive lead is arranged over the superconductor component such that the superconductor component shields the semiconductor component from the conductive lead. The tunnel barrier is arranged between the superconductor component and the at least one conductive lead. The tunnel barrier consists of a native aluminium oxide layer formed integrally to the superconductor component. Forming the tunnel barrier integrally to the superconductor component provides a high-quality dielectric barrier between the conductive lead and the semiconductor-superconductor hybrid structure.
    Type: Application
    Filed: September 1, 2021
    Publication date: November 7, 2024
    Inventors: Leonardus P. Kouwenhoven, Ji-Yin WANG, Vukan LEVAJAC, Mathilde Flore LEMANG
  • Publication number: 20210296560
    Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.
    Type: Application
    Filed: May 27, 2021
    Publication date: September 23, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven
  • Patent number: 11024792
    Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: June 1, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven
  • Publication number: 20200243742
    Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.
    Type: Application
    Filed: January 25, 2019
    Publication date: July 30, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven