Patents by Inventor Leonid Shamis
Leonid Shamis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11316757Abstract: As described herein, a system, method, and computer program provide consumer requirement based management for a physical edge deployment of an application. In use, a communication service provider received, from a third party, a definition of one or more service requirements for an application deployed within a network of the communication service provider. Further, the communication service provider manages a physical edge deployment of the application within the network for the third party to satisfy the one or more service requirements of the third party.Type: GrantFiled: June 23, 2020Date of Patent: April 26, 2022Assignee: AMDOCS DEVELOPMENT LIMITEDInventors: Nagina Eliav, Thomas Leonard Trevor Plestid, Leonid Shamis, Sagar Tayal
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Patent number: 11276135Abstract: Techniques for improving data transfer in a system having multiple accelerated processing devices (“APDs”) are described herein. In such a system, multiple APDs are coupled to a processor (e.g., a central processing unit (“CPU”)) via a general interconnect fabric and to each other via a high speed interconnect. The techniques herein increase the effective bandwidth for transfer of data between the CPU and the APD by transmitting data to both APDs through the portion of the interconnect fabric coupled to each respective APD. Then, one of the APDs transfers data to the other APD or to the processor via the high speed inter-APD interconnect. Although data transferred “indirectly” through the helper APD takes slightly more time to be transferred than a direct transfer, the total effective bandwidth to the target is increased due to the high-speed inter-APD interconnect.Type: GrantFiled: April 23, 2020Date of Patent: March 15, 2022Assignee: ATI Technologies ULCInventors: Syed Arshad Rahman, Michael I. Hvizdos, Leonid Shamis
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Publication number: 20200258187Abstract: Techniques for improving data transfer in a system having multiple accelerated processing devices (“APDs”) are described herein. In such a system, multiple APDs are coupled to a processor (e.g., a central processing unit (“CPU”)) via a general interconnect fabric and to each other via a high speed interconnect. The techniques herein increase the effective bandwidth for transfer of data between the CPU and the APD by transmitting data to both APDs through the portion of the interconnect fabric coupled to each respective APD. Then, one of the APDs transfers data to the other APD or to the processor via the high speed inter-APD interconnect. Although data transferred “indirectly” through the helper APD takes slightly more time to be transferred than a direct transfer, the total effective bandwidth to the target is increased due to the high-speed inter-APD interconnect.Type: ApplicationFiled: April 23, 2020Publication date: August 13, 2020Applicant: ATI Technologies ULCInventors: Syed Arshad Rahman, Michael I. Hvizdos, Leonid Shamis
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Patent number: 10672095Abstract: Techniques for improving data transfer in a system having multiple accelerated processing devices (“APDs”) are described herein. In such a system, multiple APDs are coupled to a processor (e.g., a central processing unit (“CPU”)) via a general interconnect fabric and to each other via a high speed interconnect. The techniques herein increase the effective bandwidth for transfer of data between the CPU and the APD by transmitting data to both APDs through the portion of the interconnect fabric coupled to each respective APD. Then, one of the APDs transfers data to the other APD or to the processor via the high speed inter-APD interconnect. Although data transferred “indirectly” through the helper APD takes slightly more time to be transferred than a direct transfer, the total effective bandwidth to the target is increased due to the high-speed inter-APD interconnect.Type: GrantFiled: December 15, 2017Date of Patent: June 2, 2020Assignee: ATI TECHNOLOGIES ULCInventors: Syed Arshad Rahman, Michael I. Hvizdos, Leonid Shamis
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Publication number: 20190188822Abstract: Techniques for improving data transfer in a system having multiple accelerated processing devices (“APDs”) are described herein. In such a system, multiple APDs are coupled to a processor (e.g., a central processing unit (“CPU”)) via a general interconnect fabric and to each other via a high speed interconnect. The techniques herein increase the effective bandwidth for transfer of data between the CPU and the APD by transmitting data to both APDs through the portion of the interconnect fabric coupled to each respective APD. Then, one of the APDs transfers data to the other APD or to the processor via the high speed inter-APD interconnect. Although data transferred “indirectly” through the helper APD takes slightly more time to be transferred than a direct transfer, the total effective bandwidth to the target is increased due to the high-speed inter-APD interconnect.Type: ApplicationFiled: December 15, 2017Publication date: June 20, 2019Applicant: ATI Technologies ULCInventors: Syed Arshad Rahman, Michael I. Hvizdos, Leonid Shamis
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Patent number: 9523736Abstract: An apparatus for detecting fault injection includes a high-fanout network, which spans an Integrated Circuit (IC), and circuitry. In some embodiments, the high-fanout network is continuously inactive during functional operation of the IC, and the circuitry is configured to sense signal levels at multiple sampling points in the high-fanout network, and to identify a fault injection attempt by detecting, based on the sensed signal levels, a signal abnormality in the high-fanout network. In some embodiments, the circuitry is configured to sense signal levels at multiple sampling points in the high-fanout network, to distinguish, based on the sensed signal levels, between legitimate signal variations and signal abnormalities in the high-fanout network during functional operation of the IC, and to identify a fault injection attempt by detecting a signal abnormality.Type: GrantFiled: June 19, 2014Date of Patent: December 20, 2016Assignee: NUVOTON TECHNOLOGY CORPORATIONInventors: Ziv Hershman, Leonid Shamis, Natan Keren
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Publication number: 20150369865Abstract: An apparatus for detecting fault injection includes a high-fanout network, which spans an Integrated Circuit (IC), and circuitry. In some embodiments, the high-fanout network is continuously inactive during functional operation of the IC, and the circuitry is configured to sense signal levels at multiple sampling points in the high-fanout network, and to identify a fault injection attempt by detecting, based on the sensed signal levels, a signal abnormality in the high-fanout network. In some embodiments, the circuitry is configured to sense signal levels at multiple sampling points in the high-fanout network, to distinguish, based on the sensed signal levels, between legitimate signal variations and signal abnormalities in the high-fanout network during functional operation of the IC, and to identify a fault injection attempt by detecting a signal abnormality.Type: ApplicationFiled: June 19, 2014Publication date: December 24, 2015Inventors: Ziv Hershman, Leonid Shamis, Natan Keren
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Patent number: 8006004Abstract: A processor having a core configured to control a keyboard and a plurality of pins connected to the core, configured to transfer signals from the processor to the keyboard. A controller is configured to transfer signals from one or more registers through at least one of the pins, intermittently with signals transferred to the keyboard.Type: GrantFiled: July 8, 2008Date of Patent: August 23, 2011Assignee: Nuvoton Technology Corp.Inventors: Victor Flachs, Nir Tasher, Nimrod Peled, Leonid Shamis, Shani Mayer
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Patent number: 7676003Abstract: A method for processing a signal envelope generated by demodulating a received signal that includes a train of pulses that is transmitted at a carrier frequency and is modulated at a given baud rate with data symbols in accordance with a predetermined communication protocol, which defines features of the modulated signal. The method includes measuring a duration of a selected feature in the signal envelope as defined by the communication protocol. The baud rate of the signal is estimated based on the measured duration without counting the pulses in the received signal. The data symbols are decoded by processing the signal envelope responsively to the estimated baud rate.Type: GrantFiled: September 6, 2006Date of Patent: March 9, 2010Assignee: Winbond Electronics CorporationInventors: Victor Flachs, Michal Schramm, Leonid Shamis
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Publication number: 20100011130Abstract: A processor having a core configured to control a keyboard and a plurality of pins connected to the core, configured to transfer signals from the processor to the keyboard. A controller is configured to transfer signals from one or more registers through at least one of the pins, intermittently with signals transferred to the keyboard.Type: ApplicationFiled: July 8, 2008Publication date: January 14, 2010Applicant: Nuvoton Technology CorporationInventors: Nir Tasher, Victor Flachs, Nimrod Peled, Leonid Shamis, Shani Mayer
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Publication number: 20080056411Abstract: A method for processing a signal envelope generated by demodulating a received signal that includes a train of pulses that is transmitted at a carrier frequency and is modulated at a given baud rate with data symbols in accordance with a predetermined communication protocol, which defines features of the modulated signal. The method includes measuring a duration of a selected feature in the signal envelope as defined by the communication protocol. The baud rate of the signal is estimated based on the measured duration without counting the pulses in the received signal. The data symbols are decoded by processing the signal envelope responsively to the estimated baud rate.Type: ApplicationFiled: September 6, 2006Publication date: March 6, 2008Applicant: WINBOND ELECTRONICS CORPORATIONInventors: Victor Flachs, Michal Schramm, Leonid Shamis