Patents by Inventor Leroy Jones
Leroy Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10594983Abstract: A surveillance system is provided including an Internet-enabled (IP) camera and nodes that determine the location of a plurality of sensors, which are wirelessly connected to the IP camera. The nodes determine the position of the plurality of sensors and the IP camera through the use of position determining techniques including multilateration, trilateration, and triangulation. Additionally, line of sight positioning methods and global positioning system devices may be used in setting up a positional awareness system, which enables the IP camera to control systems based on condition information and positional awareness.Type: GrantFiled: December 10, 2014Date of Patent: March 17, 2020Assignee: Robert Bosch GmbHInventors: Benjamin Robert Dannan, Ajit Belsarkar, Bogdan Viorel Iepure, Theodore Leroy Jones, Philip Hennessy
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Patent number: 10419681Abstract: A multi-imager assembly including a plurality of imagers, a chassis, a drive assembly, and a controller. The plurality of imagers is operable to produce a composite image, with each of the plurality of imagers having optical zoom capability such that each of the plurality of imagers has a variable field of view. The chassis movably supports the plurality of imagers, and the drive assembly is operable to move the plurality of imagers while supported by the chassis. The controller is operable to coordinate movement of the plurality of imagers based at least in part upon the variable field of view of each of the plurality of imagers to produce the composite image.Type: GrantFiled: October 26, 2016Date of Patent: September 17, 2019Assignee: Robert Bosch GmbHInventor: Theodore Leroy Jones
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Publication number: 20180115720Abstract: A multi-imager assembly including a plurality of imagers, a chassis, a drive assembly, and a controller. The plurality of imagers is operable to produce a composite image, with each of the plurality of imagers having optical zoom capability such that each of the plurality of imagers has a variable field of view. The chassis movably supports the plurality of imagers, and the drive assembly is operable to move the plurality of imagers while supported by the chassis. The controller is operable to coordinate movement of the plurality of imagers based at least in part upon the variable field of view of each of the plurality of imagers to produce the composite image.Type: ApplicationFiled: October 26, 2016Publication date: April 26, 2018Inventor: Theodore Leroy Jones
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Publication number: 20160173827Abstract: A surveillance system is provided including an Internet-enabled (IP) camera and nodes that determine the location of a plurality of sensors, which are wirelessly connected to the IP camera. The nodes determine the position of the plurality of sensors and the IP camera through the use of position determining techniques including multilateration, trilateration, and triangulation. Additionally, line of sight positioning methods and global positioning system devices may be used in setting up a positional awareness system, which enables the IP camera to control systems based on condition information and positional awareness.Type: ApplicationFiled: December 10, 2014Publication date: June 16, 2016Inventors: Benjamin Robert Dannan, Ajit Belsarkar, Bogdan Viorel Iepure, Theodore Leroy Jones, Philip Hennessy
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Patent number: 8198903Abstract: A chassis shielding effectiveness evaluation system includes a chassis having a chassis ground. A board is located in the chassis and includes a board ground layer. A signal generator includes at least one ground member coupled to the chassis ground and a signal member coupled to the board ground layer. The signal generator is operable to send a signal through the signal member to the board ground layer.Type: GrantFiled: January 14, 2010Date of Patent: June 12, 2012Assignee: Dell Products L.P.Inventors: Jeffrey C. Hailey, Jorge C. Marcet, Leroy Jones, Jr., Raymond A. McCormick, Todd W. Steigerwald, Tze-Chuen Toh
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Publication number: 20110169503Abstract: A chassis shielding effectiveness evaluation system includes a chassis having a chassis ground. A board is located in the chassis and includes a board ground layer. A signal generator includes at least one ground member coupled to the chassis ground and a signal member coupled to the board ground layer. The signal generator is operable to send a signal through the signal member to the board ground layer.Type: ApplicationFiled: January 14, 2010Publication date: July 14, 2011Applicant: DELL PRODUCTS L.P.Inventors: Jeffrey C. Hailey, Jorge C. Marcet, Leroy Jones, JR., Raymond A. McCormick, Todd W. Steigerwald, Tze-Chuen Toh
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Patent number: 7761749Abstract: An apparatus and method for reducing false triggering of a signal due to an electrostatic discharge event are disclosed. The method includes detecting a high voltage on a signal received at an input of a delay circuit and delaying the signal between the input of the delay circuit and an output of the delay circuit for a predetermined amount of time. If a low voltage is detected on the signal after the predetermined amount of time, the high voltage is prevented from propagating to the output of the delay circuit.Type: GrantFiled: May 31, 2007Date of Patent: July 20, 2010Assignee: Dell Products L.P.Inventor: Leroy Jones
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Patent number: 7521934Abstract: A current measurement control system for a power supply system is provided. The current measurement control system includes a load module that estimates a total load of the power supply system. An amplification module selectively determines an amplification factor based on the total load and amplifies a current signal based on the amplification factor. A current measurement module measures current based on the amplified current signal.Type: GrantFiled: October 16, 2006Date of Patent: April 21, 2009Assignee: Yazaki North America, Inc.Inventors: James Leroy Jones, III, Sam Yonghong Guo, Yuanyuan Wu
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Publication number: 20080052563Abstract: An apparatus and method for reducing false triggering of a signal due to an electrostatic discharge event are disclosed. The method includes detecting a high voltage on a signal received at an input of a delay circuit and delaying the signal between the input of the delay circuit and an output of the delay circuit for a predetermined amount of time. If a low voltage is detected on the signal after the predetermined amount of time, the high voltage is prevented from propagating to the output of the delay circuit.Type: ApplicationFiled: May 31, 2007Publication date: February 28, 2008Applicant: DELL PRODUCTS L.P.Inventor: Leroy Jones
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Patent number: 7329158Abstract: A male terminal has spring elements bent back from a rounded end above a flat portion of the terminal and separated by a centrally located opening. An aperture extends through the flat portion under the opening. Elongated ridges protrude from an underside of the flat portion. A female terminal has arms overhanging a base to form receptacles for the spring elements. Down-turned alignment ribs on the arms are received in the opening in the male terminal to properly align the terminals during electrical connection. Dimples protrude from the arms to contact the spring elements of the male terminal as the spring elements are inserted. The elongated ridges on the underside of the flat portion of the male terminal contact the base of the female terminal. A lock tab in the base between the ribs snaps into the aperture to latch the terminals together when the spring elements are fully inserted.Type: GrantFiled: June 30, 2006Date of Patent: February 12, 2008Assignee: Yazaki North America, Inc.Inventors: James Dickinson Roberts, Joseph Paul Kalisz, James Leroy Jones, III, Kevin James Updike, Weizhen Brenda Wang
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Patent number: 7240248Abstract: An apparatus and method for reducing false triggering of a signal due to an electrostatic discharge event are disclosed. The method includes detecting a high voltage on a signal received at an input of a delay circuit and delaying the signal between the input of the delay circuit and an output of the delay circuit for a predetermined amount of time. If a low voltage is detected on the signal after the predetermined amount of time, the high voltage is prevented from propagating to the output of the delay circuit.Type: GrantFiled: November 10, 2003Date of Patent: July 3, 2007Assignee: Dell Products L.P.Inventor: Leroy Jones
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Patent number: 7160157Abstract: An electrical terminal connection system includes first and second terminals that are interlocked by placing the first terminal on top of the second terminal and rotating the first terminal. The first terminal has a planar ring section with an outer perimeter and a centrally located aperture. The perimeter has cut-out portions. Inclined spring elements extend from the ring section near the outer perimeter. The second terminal includes a semi-circular part with an outer periphery and a centrally located collar. Curved walls extend perpendicularly from the outer periphery. The walls have ledges projecting over the semi-circular part. Aligning the cut-out portions of the first terminal with the curved walls and ledges of the second terminal enables the planar ring section of the first terminal to be placed on the semi-circular part of the second terminal, with the aperture receiving the collar. Rotating or twisting the first terminal causes the spring elements to contact and slide under the ledges.Type: GrantFiled: March 17, 2006Date of Patent: January 9, 2007Assignee: Yazaki North America, Inc.Inventors: James Leroy Jones, III, James Dickinson Roberts, Joseph Paul Kalisz, Kevin James Updike
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Patent number: 7134893Abstract: An electrical terminal connection system has a first terminal for attachment to a high-current cable. The first terminal is formed to include a wire-connect section for direct attachment to the wire and an intermediate stem section joining the wire-connect section to a contact section. The contact section has two opposite sides and deflectable arms extending along each side in parallel relation to each other. The arms are raised from the contact section and extend to free ends adjacent to an end of the contact section. A second terminal extends from a device-side of the connection, such as from a power distribution module (PDM). The second terminal has an initial seating section joined to a bus bar extending from within the PDM and a retaining section having two opposite edges. A short wall extends perpendicularly from each edge of the retaining section and a ledge extends from a top of each wall to overhang part of the retaining section. Each ledge has a portion slanted toward the seating section.Type: GrantFiled: March 23, 2006Date of Patent: November 14, 2006Assignee: Yazaki North America, Inc.Inventors: Joseph Paul Kalisz, James Leroy Jones, III, James Dickinson Roberts
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Publication number: 20050102588Abstract: An apparatus and method for reducing false triggering of a signal due to an electrostatic discharge event are disclosed. The method includes detecting a high voltage on a signal received at an input of a delay circuit and delaying the signal between the input of the delay circuit and an output of the delay circuit for a predetermined amount of time. If a low voltage is detected on the signal after the predetermined amount of time, the high voltage is prevented from propagating to the output of the delay circuit.Type: ApplicationFiled: November 10, 2003Publication date: May 12, 2005Applicant: Dell Products L.P.Inventor: Leroy Jones
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Patent number: 6738919Abstract: A technique for reducing electromagnetic interference (EMI) in electronic systems that provides a phase shift between signals having a common frequency component propagating on adjacent portions of circuit board signal traces. The phase shift is produced by a delay element in one of the adjacent signal traces. In one example, the delay element includes a serpentine delay located at the signal generating circuit side of the adjacent portion of the signal trace. Such a technique can be used to reduce EMI emissions from clock signals provided to RAM circuits of a system memory of a computer system.Type: GrantFiled: January 26, 2001Date of Patent: May 18, 2004Assignee: Dell Products L.P.Inventors: Steven L. Williams, Richard N. Worley, Satish N. Pratapneni, Leroy Jones, Jr.
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Patent number: 6700620Abstract: A surveillance camera housing contains a crown plate with voids and radially extending flanges which engage corresponding radially extending flanges and voids in a mounting cap. A radial gasket is disposed upon said crown plate and electrical connectors are disposed within said radial gasket. In operation, the flanges of the crown plate are placed within the voids of the mounting cap and the flanges of the mounting cap are placed in the voids of the crown plate. When the housing is further lifted vertically a horizontal plane defined by the crown plate flanges rises above a horizontal plane defined by the mounting cap flanges. The housing is then rotated so that the crown plate flanges rest upon the mounting cap flanges.Type: GrantFiled: February 19, 1999Date of Patent: March 2, 2004Assignee: Robert Bosch GmbHInventors: Kathleen Elaine Arnold, Theodore Leroy Jones
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Patent number: 6555743Abstract: A computer system including a number of option bays that accommodate optional peripheral equipment, such as CD-ROM drives, DVD drives, magnetic tape backup systems and Zip drives. An unpopulated bay is segmented into compartments by a divider that extends through substantially the entire depth of the bay so that each of the compartments operates as a waveguide beyond frequency cutoff (WBFC). The resulting compartments are characterized by cross-sectional dimensions that are less than the cross-sectional dimensions of the bay, so that the compartmentalization effects substantially enhanced attenuation of electromagnetic signals having a frequency at the highest expected operating frequency of the computer system.Type: GrantFiled: August 4, 2000Date of Patent: April 29, 2003Assignee: Dell Products L.P.Inventors: Richard N. Worley, Steve L. Williams, Leroy Jones, Jr.
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Publication number: 20020104034Abstract: A technique for reducing electromagnetic interference (EMI) in electronic systems that provides a phase shift between signals having a common frequency component propagating on adjacent portions of circuit board signal traces. The phase shift is produced by a delay element in one of the adjacent signal traces. In one example, the delay element includes a serpentine delay located at the signal generating circuit side of the adjacent portion of the signal trace. Such a technique can be used to reduce EMI emissions from clock signals provided to RAM circuits of a system memory of a computer system.Type: ApplicationFiled: January 26, 2001Publication date: August 1, 2002Inventors: Steven L. Williams, Richard N. Worley, Satish N. Pratapneni, Leroy Jones
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Patent number: 6359214Abstract: An EMI gasket (20) includes a plurality of serrations (34) along at least one edge (35, 36). The serrations (34) are arranged side-by-side so that each may be articulated individually. That is, one of the serrations (34) may be displaced significantly out of the plane of the gasket without affecting adjacent serrations. Thus, when the edge of the gasket (20) is compressed between two surfaces which include a discontinuity (40) such as a step or protuberance between them, the serration in contact with the discontinuity is displaced out of the plane of the gasket without displacing adjacent portions of the gasket. Allowing a portion of an EMI gasket (20) to be displaced out of the plane of the gasket without affecting adjacent portions of the gasket substantially reduces or eliminates gaps which occur due to the failure of the gasket to precisely follow the contour of a component.Type: GrantFiled: October 28, 1999Date of Patent: March 19, 2002Assignee: Dell Products, L.P.Inventors: Richard N. Worley, Leroy Jones, Jr., Steve L. Williams
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Patent number: 5977393Abstract: The present invention generally relates to ruthenium and osmium carbene catalysts for use in olefin metathesis reactions. More particularly, the present invention relates to Schiff base derivatives of ruthenium and osmium carbene catalysts and methods for making the same. The inventive catalysts are generally prepared by the treatment of unmodified catalysts with the salts of the desired Schiff base ligands, in which an anionic and a neutral electron donating ligands of the unmodified catalysts are simultaneously replaced. The Schiff base derivatives of the ruthenium and osmium carbene catalysts show unexpectedly improved thermal stability while maintaining high metathesis activity, even in polar protic solvents. Although the inventive catalysts may be used in all metathesis reactions, use of these catalysts for ring-closing metathesis ("RCM") reactions is particularly preferred.Type: GrantFiled: November 12, 1998Date of Patent: November 2, 1999Assignee: California Institute of TechnologyInventors: Robert H. Grubbs, Sukbok Chang, LeRoy Jones, II, Chunming Wang