Patents by Inventor Leroy R. Lundin

Leroy R. Lundin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7925728
    Abstract: A series of state transitions is indicative of performance of hardware service actions. A transition from, for instance, a disconnected state to a connected state for a hardware component is indicative of performance of a service action for the hardware component. Detection of this transition is automatic.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: April 12, 2011
    Assignee: International Business Machines Corporation
    Inventors: Mark G. Atkins, John Divirgilio, Jay R. Herring, LeRoy R. Lundin, Nicholas P. Rash, Karen F. Rash, legal representative
  • Patent number: 7855980
    Abstract: An exemplary method of identifying configuration topology, existing switches, and miswires in a given network is provided. Given a number of switches, which may be less than the maximum possible for the actual configuration and some ports of which may be miswired, generate a hypothesis for the supported topology of which the existing configuration is a subset. A best fit of the existing switches to the supported number switches of the maximal topology is performed, using formulae for the connections of the maximal supported topology. If supported switches are found missing in the assumed topology, the switch count is increased accordingly, and started over with a new hypothesis. When satisfied with identification, all switch ports are revisited and the connection formulae is used to identify all miswires.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: December 21, 2010
    Assignee: International Business Machines Corporation
    Inventors: LeRoy R. Lundin, Casandra H. Qiu, Aruna V. Ramanan
  • Publication number: 20090141643
    Abstract: An exemplary method of identifying configuration topology, existing switches, and miswires in a given network is provided. Given a number of switches, which may be less than the maximum possible for the actual configuration and some ports of which may be miswired, generate a hypothesis for the supported topology of which the existing configuration is a subset. A best fit of the existing switches to the supported number switches of the maximal topology is performed, using formulae for the connections of the maximal supported topology. If supported switches are found missing in the assumed topology, the switch count is increased accordingly, and started over with a new hypothesis. When satisfied with identification, all switch ports are revisited and the connection formulae is used to identify all miswires.
    Type: Application
    Filed: February 9, 2009
    Publication date: June 4, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: LeRoy R. Lundin, Casandra H. Qiu, Aruna V. Ramanan
  • Patent number: 7522541
    Abstract: An exemplary method of identifying configuration topology, existing switches, and miswires in a given network is provided. Given a number of switches, which may be less than the maximum possible for the actual configuration and some ports of which may be miswired, generate a hypothesis for the supported topology of which the existing configuration is a subset. Perform a best fit of the existing switches to the supported number switches of the maximal topology, using formulae for the connections of the maximal supported topology. If supported switches are found missing in the assumed topology, increase the switch count accordingly, and start over with a new hypothesis. When satisfied with identification, revisit all switch ports and use the connection formulae to identify all miswires.
    Type: Grant
    Filed: October 11, 2004
    Date of Patent: April 21, 2009
    Assignee: International Business Machines Corporation
    Inventors: LeRoy R. Lundin, Casandra H. Qiu, Aruna V. Ramanan
  • Patent number: 7093154
    Abstract: Adapters, which provide message communications capabilities in a multinode data processing network, are provided with a mechanism for indicating critical errors from which recovery may ultimately be possible. Error handling capabilities are incorporated which operate both globally and locally to insure, to the greatest extent possible, that applications running on the network are not prematurely terminated and that the node with the error affected adapter is not prematurely removed from its connectivity with the other nodes within it network group.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: August 15, 2006
    Assignee: International Business Machines Corporation
    Inventors: Robert F. Bartfai, John W. Doxtader, Leroy R. Lundin, Dawn S. Moyer, Nicholas P. Rash
  • Publication number: 20030101367
    Abstract: Adapters, which provide message communications capabilities in a multinode data processing network, are provided with a mechanism for indicating critical errors from which recovery may ultimately be possible. Error handling capabilities are incorporated which operate both globally and locally to insure, to the greatest extent possible, that applications running on the network are not prematurely terminated and that the node with the error affected adapter is not prematurely removed from its connectivity with the other nodes within it network group.
    Type: Application
    Filed: October 25, 2001
    Publication date: May 29, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert F. Bartfai, John W. Doxtader, Leroy R. Lundin, Dawn S. Moyer, Nicholas P. Rash
  • Patent number: 6021442
    Abstract: A method, associated apparatus and program product for partitioning a plurality of interconnection elements among disjoint partitions of processors in a computer system so as to interconnect the processors within each of the disjoint partitions, and to isolate the processors in each interconnected partition from processors in the other partitions. The interconnection elements may be arranged into groups including node coupling elements and link coupling elements and in larger systems may include intermediate groups having intermediate coupling elements.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: February 1, 2000
    Assignee: International Business Machines Corporation
    Inventors: Aruna V. Ramanan, Mark Gurevich, Leroy R. Lundin, David G. Folsom, Kevin J. Reilly, Mark G. Atkins, Robert F. Bartfai
  • Patent number: 5887184
    Abstract: A method, associated apparatus and program product for partitioning a plurality of interconnection elements among disjoint partitions of processors in a computer system so as to interconnect the processors within each of the disjoint partitions, and to isolate the processors in each interconnected partition from processors in the other partitions. The interconnection elements may be arranged into groups including node coupling elements and link coupling elements and in larger systems may include intermediate groups having intermediate coupling elements.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: March 23, 1999
    Assignee: International Business Machines Corporation
    Inventors: Aruna V. Ramanan, Mark Gurevich, Leroy R. Lundin, David G. Folsom, Kevin J. Reilly, Mark G. Atkins, Robert F. Bartfai
  • Patent number: 5884090
    Abstract: A method, associated apparatus and program product for partitioning a plurality of interconnection elements among disjoint partitions of processors in a computer system so as to interconnect the processors within each of the disjoint partitions, and to isolate the processors in each interconnected partition from processors in the other partitions. The interconnection elements may be arranged into groups including node coupling elements and link coupling elements and in larger systems may include intermediate groups having intermediate coupling elements.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: March 16, 1999
    Assignee: International Business Machines Corporation
    Inventors: Aruna V. Ramanan, Mark Gurevich, Leroy R. Lundin, David G. Folsom, Kevin J. Reilly, Mark G. Atkins, Robert F. Bartfai