Abstract: An apparatus comprising an integrated circuit chip comprising a first surface region and a second surface region adjacent to the first surface region; a substrate coupled to the integrated circuit chip through a plurality of connections comprising solder; and underfill between the substrate and the integrated circuit chip, wherein the underfill contacts the second surface region, but does not contact the first surface region.

Abstract: Embodiments may relate to a microelectronic package that includes an active die at a first side of the substrate and an interconnect at a second side of the substrate. A high-speed input/output (HSIO) die may also be coupled with the first side of substrate. The HSIO die may be coupled with the active die by a bridge. Other embodiments may be described or claimed.

Abstract: A mounting substrate for a processor includes a die side and a land side with a processor footprint configured on the die side. The processor footprint is coupled to at least one processor interconnect and a microelectronic die is embedded in the mounting substrate. The microelectronic die is coupled to the processor interconnect and communication between a processor to be installed on the processor footprint is in a rate between 10 Gb/s and 1 Tb/s.

Abstract: A mounting substrate for a processor includes a die side and a land side with a processor footprint configured on the die side. The processor footprint is coupled to at least one processor interconnect and a microelectronic die is embedded in the mounting substrate. The microelectronic die is coupled to the processor interconnect and communication between a processor to be installed on the processor footprint is in a rate between 10 Gb/s and 1 Tb/s.

Abstract: A mounting substrate for a processor includes a die side and a land side with a processor footprint configured on the die side. The processor footprint is coupled to at least one processor interconnect and a microelectronic die is embedded in the mounting substrate. The microelectronic die is coupled to the processor interconnect and communication between a processor to be installed on the processor footprint is in a rate between 10 Gb/s and 1 Tb/s.

Abstract: A mounting substrate for a processor includes a die side and a land side with a processor footprint configured on the die side. The processor footprint is coupled to at least one processor interconnect and a microelectronic die is embedded in the mounting substrate. The microelectronic die is coupled to the processor interconnect and communication between a processor to be installed on the processor footprint is in a rate between 10 Gb/s and 1 Tb/s.

Abstract: An integrated circuit (IC) package includes a package substrate and a cap attached to the package substrate. The package substrate and the cap define a space therebetween. The IC package also includes a section of flex tape housed in the space defined by the cap and the package substrate.

Abstract: A system may include an integrated circuit die, a package, and an interconnect. The integrated circuit die may include a conductive die pad, the package may include a conductive package pad, and the interconnect may include two or more stranded wires. A first end of the interconnect is electrically coupled to the conductive die pad, and a second end of the interconnect is electrically coupled to the package pad.

Abstract: A method and apparatus for a conductive plate for a socket. The conductive plate includes a plurality of openings. The conductive plate is electrically connected to ground and is contained within a socket that may receive an electronic package. The openings allow pins from the electronic package to pass through to contacts in the socket. The diameter of each opening is customizable to produce desired impedance between the electronic package pin inserted in the contact and the conductive plate. Impedance discontinuity seen by signals passing through the socket from the electronic package pins is reduced. The electronic plate may contain one or more pins insertable into contacts in the socket where the contacts provide the electrical connection to ground.

Abstract: A method and apparatus for a conductive plate for a socket. The conductive plate includes a plurality of openings. The conductive plate is electrically connected to ground and is contained within a socket that may receive an electronic package. The openings allow pins from the electronic package to pass through to contacts in the socket. The diameter of each opening is customizable to produce desired impedance between the electronic package pin inserted in the contact and the conductive plate. Impedance discontinuity seen by signals passing through the socket from the electronic package pins is reduced. The electronic plate may contain one or more pins insertable into contacts in the socket where the contacts provide the electrical connection to ground.