Abstract: An overcharging of a back-up battery through a protection diode of a first power regulating FET is prevented by adding a second power regulating FET that is equivalent to the first FET and the second FET has its source and drain connections reversed. By connecting and operating the second FET in a reverse direction from the first FET, the forward current direction of the protection diode of the second FET is opposite to the forward current direction of the protection diode of the first FET. Thus, the power regulator will always have one of the protection diodes reverse biased, thereby preventing reverse overcharging through the diodes. A power regulator using two such power FETs in series to prevent reverse overcharge current has a lower ON impedance than only one power FET that is in series with a blocking diode, and thereby provides more usable voltage and current for back-up situations.

Abstract: The subject invention is a power supply comprising a magnetic amplifier, filter, back-up battery, switch-over regulating circuit and error amplifier. The magnetic amplifier receives a plurality of AC pulses and controls the pulse width of the pulses. The filter converts the pulses to a DC output. The switch-over regulating circuit connects the battery to the DC output. The error amplifier monitors the DC output and provides, at its output, an error signal to the magnetic amplifier and the switch-over regulating circuit.

Abstract: A bridge circuit having reference and measurement thermistors in respective adjacent arms is automatically readjusted to off-set any long term drift of the thermistors. The readjustment of the bridge circuit is performed between normal measurement operations using a bridge output error signal produced by the drift of the thermistors. The output signal of the bridge circuit is also applied to a comparator circuit to produce a polarity characterized output signal in response to the relative magnitude between the bridge output signal and a fixed reference signal. This characterized output signal is used to control the counting direction of an up/down counter. A source of fixed frequency pulses is connected to the input of the up/down counter during a sample window time between the measurement operations to change the count stored in the counter in accordance with the direction of counting as determined by the output signal from the comparator.