Abstract: A low-noise active pixel circuit is disclosed that efficiently suppresses reset (kTC) noise by using a compact preamplifier consisting of a photodetector and only three transistors of identical polarity, in conjunction with ancillary circuits located on an imager's periphery. The use of only three transistors with a tapered reset signal allows the optical area to be increased, while still providing a low-noise imager.

Abstract: A self-adjusting adaptive input circuit with minimal excess noise and a linear charge-handling capacity exceeding 109 electrons to enable high-quality imaging at long wavelength infrared backgrounds and video frame rates is disclosed. An integration capacitor stores a charge produced from a photodetector. A self-adjusting current source skims a current during integration on the integration capacitor. The gate voltage of a skimming transistor is set via a programming transistor in order to set the skim level.

Abstract: An active-pixel low-noise imaging system for implementation in CMOS or in other semiconductor fabrication technologies uses three transistors and a single capacitance per pixel. The first transistor serves as a reset and a transimpedance amplifier to facilitate high impedance and suppress reset noise without requiring expensive on-chip or off-chip memory. The second transistor is an access MOSFET used to read the signal from each pixel and multiplex the signal outputs from an array of pixels. The third MOSFET resets the detector after the integrated signal has been read. Since the detector sense node is “pinned” by the feedback amplifier, reset noise is reduced to that generated by the much smaller feedback capacitance. In addition, by using a small but well-defined feedback capacitor, an amplifier with a narrow bandwidth can be used, provided its unity-gain frequency is sufficient.

Abstract: A sensor may be formed with a transistor comprising a gate that has both n-type and p-type regions to increase the gate work function. In combination with moving the p-type well such that the p-type well only partially dopes the channel of the transistor, the increased gate work function further increases the reset voltage level required to create the reset channel without having to use high doping levels in the critical regions of the sensor structure including the photo-detector and the reset transistor. The source of the reset transistor is partially beneath the n-type region of gate, while the transistor's drain is partially beneath the p-type region of the gate. The channel has a p-type well portion and a substrate portion. This construction of the sensor may eliminate the reset noise associated with the uncertainty of whether the charge left in the transistor's channel will flow back towards the photo-detector after the transistor has been turned off.

Abstract: An imaging array of active pixel sensors uses a compact three transistor CMOS implementation for each pixel. A current source at the top of each column creates a distributed feedback amplifier for each pixel in a selected row. The reset amplifier acts as a variable resistance in the source-follower amplifier feedback circuit. The variable resistance is controlled by a range reset voltage applied to the reset amplifier thereby nulling the photodiode reset noise.

Abstract: An active pixel sensor circuit including a photodetector, a first MOS transistor functioning as the driver of a source follower amplifier during signal readout, a second MOS transistor serving as a pixel readout transistor, a third MOS transistor serving as a photodetector reset transistor, and a reset noise cancellation circuit including a fourth MOS transistor, first and second capacitances, and an amplifier having a gain which is a specified multiple of the ratio of the first to the second capacitance. The first capacitance is connected in parallel to the photodector. The amplifier reduces the reset noise caused by resetting the photodector without having to implement correlated double sampling.

Abstract: An ultra-low noise, high-gain interface pixel amplifier is provided with capability for single-photon readout of known photodetectors at high electrical bandwidths for diverse spectral bandpass from the x-ray to long IR bands. The detector charge modulates a source follower whose output is double sampled to remove correlated noise by a compact stage that also facilitates low-noise gain adjustment for a second gain stage of programmable amplification. Single-photon readout of photodetectors at high electrical bandwidths in small pixel areas is thereby facilitated.

Abstract: An imager pixel including a photodetector, a first MOS transistor functioning as the driver of a source follower amplifier, a second MOS transistor functioning as a pixel readout transistor, and a third transistor performing a dual function to reset the photodetector during a first time interval and cancel reset noise by serving as a weak current source during a second time interval.

Abstract: An imager pixel including a photodetector, a first MOS transistor functioning as the driver of a source follower amplifier during signal readout, a second MOS transistor serving as a pixel readout transistor, a third MOS transistor serving as a photodetector reset transistor, and a reset noise cancellation circuit including a fourth MOS transistor, first and second capacitances, and an amplifier having a gain which is the inverse of the ratio of the first to the second capacitance.

Abstract: An adaptive amplifier circuit with minimal excess noise and a linear charge-handling capacity exceeding 109 electrons to enable high-quality imaging at long wavelength infrared backgrounds and video frame rates with enhanced dynamic range is disclosed. An integration capacitor stores a charge produced from a photodetector. An adaptive skimming circuit skims off excess charge during integration of the charge on the integration capacitor. A switched-capacitor low pass filter provides enhanced dynamic range.

Abstract: An apparatus and method for achieving uniform low dark currents with CMOS photodiodes. A threshold voltage of a reset FET is set to an appropriate value such that the dark current from a photodiode is actively removed through the reset FET during signal integration. This reduces the dark current by over 3 orders of magnitude as compared to conventional active pixel sensors, without requiring pinned photodiodes.

Abstract: A sensor may be formed with a transistor comprising a gate that has both n-type and p-type regions to increase the gate work function. In combination with moving the p-type well such that the p-type well only partially dopes the channel of the transistor, the increased gate work function further increases the reset voltage level required to create the reset channel without having to use high doping levels in the critical regions of the sensor structure including the photo-detector and the reset transistor. The source of the reset transistor is partially beneath the n-type region of gate, while the transistor's drain is partially beneath the p-type region of the gate. The channel has a p-type well portion and a substrate portion. This construction of the sensor may eliminate the reset noise associated with the uncertainty of whether the charge left in the transistor's channel will flow back towards the photo-detector after the transistor has been turned off.

Abstract: An imaging array of active pixel sensors uses a reset amplifier in each pixel in a four transistor CMOS implementation. The reset amplifier acts as a variable resistance in the source-follower amplifier feedback circuit. The variable resistance is controlled by a range reset voltage applied to the reset amplifier thereby nulling the photodiode reset noise. The ramp reset voltage is applied to all reset amplifiers of all pixels at the same time, thereby providing for reset of the entire array at the same time, i.e., global reset.

Abstract: A photodetector sensitive to ultraviolet wavelengths is capable of single photon sensitivity at room temperatures and video frame rates. It includes (a) a compound semiconductor photodiode, biased below its avalanche breakdown threshold, comprising III-V elemental components and having a bandgap with transition energy higher than the energy of visible photons; and (b) a high input impedance MOS interface circuit, arranged to receive a signal from the photodiode junction and to amplify said signal. Preferably, the photodiode junction is integrated in a first microstructure on a first substrate, and its interface circuit in a second microstructure on a second substrate. Both microstructures are then joined in a laminar, sandwich-like structure and communicate via electrically conducting contacts.

Abstract: A photodetector sensitive to visible and shorter wavelengths is capable of single photon sensitivity at room temperatures and video frame rates. It includes (a) a compound semiconductor photodiode, biased below its avalanche breakdown threshold, comprising III-V elemental components and having a bandgap with transition energy higher than the energy of infrared photons; and (b) a high trans-impedance interface circuit, arranged to receive a signal from the photodiode junction and to amplify said signal. Preferably, the photodiode junction is integrated in a first microstructure on a first substrate, and its interface circuit in a second microstructure on a second substrate. Both microstructures are then joined in a laminar, sandwich-like structure and communicate via electrically conducting contacts.

Abstract: An ultra-low noise, high gain interface pixel amplifier is provided with capability for single-photon readout of known photodetectors at high electrical bandwidths for diverse spectral bandpass from the x-ray to long IR bands. The detector charge modulates a source follower whose output is double sampled to remove correlated noise by a compact stage that also provides optimum level shift for subsequent amplification of the full signal excursion. The level-shifted signal finally drives a compact amplifier that generates a robust end-to-end transimpedance. Single-photon readout of photodetectors at high electrical bandwidths in small pixel areas is thereby facilitated.

Abstract: An ultra-low noise, high gain interface circuit for single-photon readout of known photodetectors from the x-ray to long IR bands at video frame rates. The detector current modulate's a load FET's gate-to-source voltage, which in turn modulates the gate-to-source voltage of a gain FET thereby producing a signal current that is an amplified facsimile of the detector current. The load FET's gate-to-source voltage is connected in the negative feedback loop of a low noise, high gain amplifier. This effectively reduces the resistance seen by the photodetector by the gain of the amplifier thereby reducing the interface circuit's RC time constant by the same amount. Because the amplifier pins the load FET's gate voltage for a given flux level, the load FET's 1/f noise is transferred to the amplifier thereby enabling single-photon readout sensitivity.

Abstract: A CMOS imaging system provides low noise read out and amplification for an array of passive pixels, each of which comprises a photodetector, an access MOSFET, and a second MOSFET that functions as a signal overflow shunt and a means for electrically injecting a test signal. The read out circuit for each column of pixels includes a high gain, wide bandwidth, CMOS differential amplifier, a reset switch and selectable feedback capacitors, selectable load capacitors, correlated double sampling and sample-and-hold circuits, an optional pipelining circuit, and an offset cancellation circuit connected to an output bus to suppress the input offset nonuniformity of the amplifier. For full process compatibility with standard silicided submicron CMOS and to maximize yield and minimize die cost, each photodiode may comprise the lightly doped source of its access MOSFET. Circuit complexity is restricted to the column buffers, which exploit signal processing capability inherent in CMOS.

Abstract: An electronically scanned buffered direct injection (ESBDI) readout circuit is provided for a long wavelength infrared focal plane array (IR FPA). The ESBDI circuit comprises a cascoded CMOS inverter amplifier that allows high detector cell density and provides high voltage amplification, low input impedance, high charge capacity, and high sensitivity in a low power staring focal plane array. The amplifier employs a cascode FET to stabilize the amplifier operating point and to provide low noise access for each unit cell. Distributed capacitance along each bus line provides large overall charge capacity in a minimum of chip real estate. When not accessed, idle IR detector cells are clamped to an externally adjustable voltage to prevent excess detector noise and crosstalk. The circuit may be fabricated on a neutron transmutation doped silicon wafer to provide threshold uniformity and low power dissipation.