Abstract: A low-power image sensor includes a plurality of light-sensitive pixel cells, a plurality of analog-to-digital converters (ADCs) and image processing circuitry. The image sensor can be disposed in multiple semiconductor layers such that the pixel cells are disposed in a first layer and various other components are disposed in the second layer or between the first layer and the second layer. The image sensor is configured such that the analog output of a pixel cell is sampled by a first ADC and a second ADC within respective first and second dynamic ranges, the second dynamic range being greater than the first dynamic range. The first ADC and the second ADC sample the analog output with different sampling resolutions. The digital outputs of the first ADC and the second ADC are subsequently used by an image processor to generate a pixel value for an image frame.

Abstract: A low-power image sensor includes a plurality of light-sensitive pixel cells, a plurality of analog-to-digital converters (ADCs) and image processing circuitry. The image sensor can be disposed in multiple semiconductor layers such that the pixel cells are disposed in a first layer and various other components are disposed in the second layer or between the first layer and the second layer. The image sensor is configured such that the analog output of a pixel cell is sampled by a first ADC and a second ADC within respective first and second dynamic ranges, the second dynamic range being greater than the first dynamic range. The first ADC and the second ADC sample the analog output with different sampling resolutions. The digital outputs of the first ADC and the second ADC are subsequently used by an image processor to generate a pixel value for an image frame.

Abstract: Various technologies described herein pertain to combining high dynamic range techniques to enable rendering higher dynamic range scenes with an image sensor. The image sensor can implement a combination of spatial exposure multiplexing and temporal exposure multiplexing, for example. By way of another example, the image sensor can implement a combination of spatial exposure multiplexing and dual gain operation. Pursuant to another example, the image sensor can implement a combination of temporal exposure multiplexing and dual gain operation. In accordance with yet another example, the image sensor can implement a combination of spatial exposure multiplexing, temporal exposure multiplexing, and dual gain operation. The image sensor can be formed on a single wafer or the image sensor can be a 3D-IC image sensor that includes at least two vertically integrated layers.

Abstract: Various technologies described herein pertain to combining high dynamic range techniques to enable rendering higher dynamic range scenes with an image sensor. The image sensor can implement a combination of spatial exposure multiplexing and temporal exposure multiplexing, for example. By way of another example, the image sensor can implement a combination of spatial exposure multiplexing and dual gain operation. Pursuant to another example, the image sensor can implement a combination of temporal exposure multiplexing and dual gain operation. In accordance with yet another example, the image sensor can implement a combination of spatial exposure multiplexing, temporal exposure multiplexing, and dual gain operation.

Abstract: Various technologies described herein pertain to combining high dynamic range techniques to enable rendering higher dynamic range scenes with an image sensor. The image sensor can implement a combination of spatial exposure multiplexing and temporal exposure multiplexing, for example. By way of another example, the image sensor can implement a combination of spatial exposure multiplexing and dual gain operation. Pursuant to another example, the image sensor can implement a combination of temporal exposure multiplexing and dual gain operation. In accordance with yet another example, the image sensor can implement a combination of spatial exposure multiplexing, temporal exposure multiplexing, and dual gain operation. The image sensor can be formed on a single wafer or the image sensor can be a 3D-IC image sensor that includes at least two vertically integrated layers.

Abstract: Various technologies described herein pertain to combining high dynamic range techniques to enable rendering higher dynamic range scenes with an image sensor. The image sensor can implement a combination of spatial exposure multiplexing and temporal exposure multiplexing, for example. By way of another example, the image sensor can implement a combination of spatial exposure multiplexing and dual gain operation. Pursuant to another example, the image sensor can implement a combination of temporal exposure multiplexing and dual gain operation. In accordance with yet another example, the image sensor can implement a combination of spatial exposure multiplexing, temporal exposure multiplexing, and dual gain operation.

Abstract: An image sensor having global shutter circuitry and an extremely fine pixel pitch. Disclosed image sensors combine global shutter circuitry with rolling shutter circuitry for respective subsets of sensor pixels to marry imaging benefits of global shutter circuitry with relatively small circuit overhead of rolling shutter circuitry. Such image sensors can achieve improved optical performance with smaller pixel pitch and optical resolution than existing global shutter image sensors.

Abstract: An image sensor having global shutter circuitry and an extremely fine pixel pitch. Disclosed image sensors combine global shutter circuitry with rolling shutter circuitry for respective subsets of sensor pixels to marry imaging benefits of global shutter circuitry with relatively small circuit overhead of rolling shutter circuitry. Such image sensors can achieve improved optical performance with smaller pixel pitch and optical resolution than existing global shutter image sensors.

Abstract: Systems and methods are provided that facilitate employing a plurality of independent reset buses for a column of pixels in a pixel array of a CMOS sensor imager. Utilization of the plurality of independent reset buses for the column of pixels can enable independent reset to be effectuated when employing sub-frame integration. For example, rows to be read and reset during a given readout time interval can be selected based upon one or more criteria. Further, each of the rows selected during the given readout time interval can be associated with a respective distinct reset bus. By leveraging the plurality of independent reset buses, uniformity in pixel operation can be maintained whether operating in full frame integration mode or sub-frame integration mode. Thus, noise resultant from changing between integration modes can be mitigated by using the plurality of independent reset buses.

Abstract: Systems and methods are provided that facilitate employing a plurality of independent reset buses for a column of pixels in a pixel array of a CMOS sensor imager. Utilization of the plurality of independent reset buses for the column of pixels can enable independent reset to be effectuated when employing sub-frame integration. For example, rows to be read and reset during a given readout time interval can be selected based upon one or more criteria. Further, each of the rows selected during the given readout time interval can be associated with a respective distinct reset bus. By leveraging the plurality of independent reset buses, uniformity in pixel operation can be maintained whether operating in full frame integration mode or sub-frame integration mode. Thus, noise resultant from changing between integration modes can be mitigated by using the plurality of independent reset buses.