Patents by Inventor Lester R. Orense

Lester R. Orense has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5570012
    Abstract: A semiconductor device under test (DUT) is checked, particularly for its wirebond integrity, by comparison with an identical reference device which is known good. Each of the DUT and reference device equally has pins. A current is selectively supplied to each pin of the reference device to provide a reference voltage drop at the reference device. Similarly, an identical current is selectively supplied to each pin of the DUT to measure a voltage drop at the DUT. The voltage drop at the DUT is compared with the reference voltage drop to provide a difference. Finally, determination is made as to whether the difference is within a tolerable range.
    Type: Grant
    Filed: November 8, 1994
    Date of Patent: October 29, 1996
    Assignee: Rohm Co. Ltd.
    Inventor: Lester R. Orense