Abstract: An active via is taught which comprises at least one via and at least one transistor which acts as a switch element. The resulting active via can be used with 1D, 2.5D or 3D chips to: control circuit elements; reduce EMI between vias; increase the density of vias; improve power and thermal efficiencies of chips; simplify power, data and other routing networks on chips; enable a higher level stacking of dies or layers in a chip while maintaining modularity; etc. A control strategy system can be provided to remove the supply of power to one or more regions of the chip when the regions are not in use and to supply power to those regions when the regions are in use, or to control input and output to regions of the chip. The active vias can be fabricated with Back or Front End Of Line processes.

Abstract: An active via is taught which comprises at least one via and at least one transistor which acts as a switch element. The resulting active via can be used with 1D, 2.5D or 3D chips to: control circuit elements; reduce EMI between vias; increase the density of vias; improve power and thermal efficiencies of chips; simplify power, data and other routing networks on chips; enable a higher level stacking of dies or layers in a chip while maintaining modularity; etc. A control strategy system can be provided to remove the supply of power to one or more regions of the chip when the regions are not in use and to supply power to those regions when the regions are in use, or to control input and output to regions of the chip. The active vias can be fabricated with Back or Front End Of Line processes.

Abstract: Novel semiconductor devices are taught. The novel devices include a thin film transistor (TFT) with an n-type semiconductor layer to form a channel between a source and a drain. The TFT further includes a source-channel interfacial member adjacent to at least the source contact of the device to provide depletion layer control of the operation of the TFT.

Abstract: An active via is taught which comprises at least one via and at least one transistor which acts as a switch element. The resulting active via can be used with 1D, 2.5D or 3D chips to: control circuit elements; reduce EMI between vias; increase the density of vias; improve power and thermal efficiencies of chips; simplify power, data and other routing networks on chips; enable a higher level stacking of dies or layers in a chip while maintaining modularity; etc. A control strategy system can be provided to remove the supply of power to one or more regions of the chip when the regions are not in use and to supply power to those regions when the regions are in use, or to control input and output to regions of the chip. The active vias can be fabricated with Back or Front End Of Line processes.

Abstract: Novel semiconductor devices are taught. The novel devices include a thin film transistor (TFT) with an n-type semiconductor layer to form a channel between a source and a drain. The TFT further includes a source-channel interfacial member adjacent to at least the source contact of the device to provide depletion layer control of the operation of the TFT.

Abstract: Novel semiconductor devices are taught. The novel devices include a thin film transistor (TFT) with an n-type semiconductor layer to form a channel between a source and a drain. The TFT further includes a source-channel interfacial member adjacent to at least the source contact of the device to provide depletion layer control of the operation of the TFT.