Patents by Inventor Li An Huang

Li An Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250119920
    Abstract: A method includes: receiving a first message from a network element in the wireless network, the first message comprising validity information for a downlink transmission resource associated with a downlink transmission; and in response to the validity information indicating the downlink transmission resource being invalid, skipping monitoring the downlink transmission resource.
    Type: Application
    Filed: April 22, 2022
    Publication date: April 10, 2025
    Inventors: Xiubin SHA, Bo DAI, He HUANG, Yuan GAO, Ting LU, Li NIU, Jie TAN
  • Patent number: 12272726
    Abstract: Semiconductor structures and method for forming the same are provided. The semiconductor structure includes a substrate and nanostructures formed over the substrate and spaced apart from each other in a first direction. The semiconductor structure further includes a gate structure wrapping around the nanostructures and a semiconductor layer attached to the nanostructures in a second direction different from the first direction. The semiconductor structure further includes inner spacers sandwiched between the semiconductor layer and the gate structure in the second direction and a silicide layer formed over the semiconductor layer. In addition, a first portion of the semiconductor layer is sandwiched between the inner spacers and the silicide layer in the second direction.
    Type: Grant
    Filed: October 16, 2023
    Date of Patent: April 8, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Ching Cheng, I-Sheng Chen, Tzu-Chiang Chen, Shih-Syuan Huang, Hung-Li Chiang
  • Patent number: 12272012
    Abstract: In one embodiment, a method includes capturing images of a first user wearing a VR display device in a real-world environment. The method includes receiving a VR rendering of a VR environment. The VR rendering is from the perspective of the mobile computing device with respect to the VR display device. The method includes generating a first MR rendering of the first user in the VR environment. The first MR rendering of the first user is based on a compositing of the images of the first user and the VR rendering. The method includes receiving an indication of a user interaction with one or more elements of the VR environment in the first MR rendering. The method includes generating, in real-time responsive to the indication of the user interaction with the one or more elements, a second MR rendering of the first user in the VR environment. The one or more elements are modified according to the interaction.
    Type: Grant
    Filed: May 22, 2023
    Date of Patent: April 8, 2025
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Sarah Tanner Simpson, Gregory Smith, Jeffrey Witthuhn, Ying-Chieh Huang, Shuang Li, Wenliang Zhao, Peter Koch, Meghana Reddy Guduru, Ioannis Pavlidis, Xiang Wei, Kevin Xiao, Kevin Joseph Sheridan, Bodhi Keanu Donselaar, Federico Adrian Camposeco Paulsen
  • Patent number: 12270224
    Abstract: A posture stabilizing structure for a swimming pool sewage suction machine includes a base, a driving wheel assembly, a sealing box, a water pump assembly and a collecting box. The driving wheel assembly is connected to the base, the water pump assembly is arranged inside the base, the collecting box is arranged inside the base and communicated with the water pump assembly, and the sealing box is arranged on a middle part of a bottom of the base. The interior of the base is divided into an inner ring water distribution bin and an outer ring water distribution bin through the collecting box. A gas-liquid circulation hole is further defined in both a front end and a rear end of the bottom of the base and communicated with the outer ring water distribution bin.
    Type: Grant
    Filed: November 24, 2022
    Date of Patent: April 8, 2025
    Assignees: ZHEJIANG KUOCHUANG TECHNOLOGY CO., LTD., ZHEJIANG SAFUN INDUSTRIAL CO., LTD.
    Inventors: Changda Wu, Shurong Lv, Li Huang, Jiahao Huang, Yiheng Ying, Kuo Ying, Huifei Huang
  • Publication number: 20250113696
    Abstract: A display substrate, a display panel, and preparation methods thereof. The display substrate includes a base substrate, a bonding pad, and an insulating layer. The bonding pad is located on one side of the base substrate and includes at least two bonding pad layers stacked in a thickness direction of the base substrate. The insulating layer is located between adjacent two of the bonding pad layers, and the insulating layer includes a via. In adjacent two of the bonding pad layers, the bonding pad layer on the side away from the base substrate extends into the via and is electrically connected to the bonding pad layer on the side close to the base substrate.
    Type: Application
    Filed: December 10, 2024
    Publication date: April 3, 2025
    Applicant: Chengdu Vistar Optoelectronics Co., Ltd.
    Inventors: Li HE, Xiuqi HUANG, Xuan CAO, Yunlei CHEN, Xiaolong ZHANG
  • Publication number: 20250112032
    Abstract: In an embodiment, a magnetic assembly includes: an inner permeance annulus; and an outer permeance annulus connected to the inner permeance annulus via magnets, wherein the outer permeance annulus comprises a peak region with a thickness greater than other regions of the outer permeance annulus.
    Type: Application
    Filed: December 13, 2024
    Publication date: April 3, 2025
    Inventors: Tsung-Jen YANG, Yi-Zhen CHEN, Chih-Pin WANG, Chao-Li SHIH, Ching-Hou SU, Cheng-Yi HUANG
  • Publication number: 20250111295
    Abstract: Disclosed are an Internet of Vehicles platform expansion and contraction method and system, and a storage medium, which belong to the technical filed of Internet of Vehicles platforms. The method includes: acquiring resource prediction basic information, and performing resource prediction based on the resource prediction basic information and a pre-constructed resource prediction model; determining a corresponding middleware messaging solution based on a service type; generating an expansion and contraction solution based on a predicted resource and the middleware messaging solution, and performing Internet of Vehicles platform expansion and contraction based on the expansion and contraction solution; and correcting, based on a change in a consumer cluster, the Internet of Vehicles platform expansion and contraction solution in real time during operation. The middleware messaging solution is determined based on the service type, to realize stateful service deployment.
    Type: Application
    Filed: January 31, 2024
    Publication date: April 3, 2025
    Applicant: Chongqing Changan Automobile Co Ltd
    Inventors: Tao LUO, Li HUANG, Meiyuan LONG, Gang YI, Zhijun WU
  • Patent number: 12263001
    Abstract: A neural interface circuit for bidirectional signal transmission includes at least one electrode configured to collect a neural signal and receive an excitation signal. The neural interface circuit can transmit signals bidirectionally. On the one hand, neural signals can be collected through electrodes, and on the other hand, excitation signals can be received through electrodes. The excitation signals can achieve the purpose of researching or intervening treatment.
    Type: Grant
    Filed: July 8, 2024
    Date of Patent: April 1, 2025
    Assignee: WUHAN NEURACOM TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Li Huang, Cheng Huang, Kai Li, Moutao Li
  • Patent number: 12268079
    Abstract: A display substrate includes: a wafer base (1) provided with a transistor; a metal reflective structure (2) on the wafer base, the metal reflective structure being electrically connected to the transistor, and being provided with a protrusion (21) protruding away from the wafer base; a first insulation layer (3) on a side of the metal reflective structure away from the wafer base, a surface of a portion of the first insulation layer corresponding to the metal reflective structure and facing away from the metal reflective structure being flush with a top face of the protrusion; and a transparent anode (4) on a side of the first insulation layer facing away from the metal reflective structure, the transparent anode being in contact connection with the top face of the protrusion.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: April 1, 2025
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Li Liu, Junbo Wei, Pengcheng Lu, Shengji Yang, Kuanta Huang, Rongrong Shi, Yuanlan Tian, Dacheng Zhang
  • Patent number: 12267076
    Abstract: The present disclosure discloses a clock and data recovery circuit. A sampling circuit performs burst mode over-sampling on an input analog data signal according to a sampling timing in a burst mode to generate over-sampling results. A selection circuit determines neighboring two of the over-sampling results having opposite logic states in the burst mode to select data edge sampling results and data center sampling results interlaced with each other and having the same time period with input analog data signal from the over-sampling results accordingly to be output sampling results. A phase detection circuit performs phase detection according to the output sampling result to generate a phase locking direction. A phase adjusting circuit adjusts the sampling timing of the sampling circuit according to the phase locking direction to track the input analog data signal.
    Type: Grant
    Filed: August 25, 2023
    Date of Patent: April 1, 2025
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chi-Kung Kuan, Li-Jun Gu, Peng Huang, Chia-Peng Fang, Zhi-Yong Tang
  • Publication number: 20250099748
    Abstract: Disclosed are a microneedle and a neural interface system. The microneedle comprises at least one microneedle body, wherein the microneedle body comprises a lining plate (5) and at least one body electrode (1), and the lining plate (5) is of an arc-shaped structure. The microneedle body has the form of an arc-shaped structure and can wrap an optic nerve (6), so as to facilitate the reading of an optic nerve signal, or stimulate the optic nerve (6) by means of the body electrode (1) so as to generate artificial vision in a visual center.
    Type: Application
    Filed: October 21, 2022
    Publication date: March 27, 2025
    Inventors: Li HUANG, Cheng HUANG, Junwang JI, Jianfei GAO, Zhanfeng MA
  • Publication number: 20250099692
    Abstract: A metered-dose atomization module, an atomizer, a spray assembly and the use thereof. The metered-dose atomization module includes: a spray head in which an atomization cavity has a step surface; an atomization piece, including an annular brake and a microporous membrane attached to a side surface of the annular brake; rubber rings, including a first sealing ring and a second sealing ring, the first sealing ring and the second sealing ring being annular and arranged on two sides of the atomization piece respectively; and a pressing plate, the pressing plate being annular and fixed to the spray head, and being adapted to cooperate with the step surface to install the atomization piece and the rubber rings in the atomization cavity.
    Type: Application
    Filed: December 27, 2022
    Publication date: March 27, 2025
    Applicant: SUNSHINE LAKE PHARMA CO., LTD.
    Inventors: Xuqi LIN, Sumin HE, Liqiu MOU, Li CAO, Jinsong YOU, Fangfang HUANG
  • Publication number: 20250104622
    Abstract: A pixel driving circuit, including: a driving transistor, and first and second energy storage elements; a first reset sub-circuit configured to write an initialization voltage signal to a third node in response to a first reset signal; a second reset sub-circuit configured to, in response to a second reset signal, turn it conductive between a gate of the driving transistor and a fourth node and reset the two; a data writing sub-circuit configured to write a data voltage signal to the second energy storage element in response to a scanning signal; and a light emitting control sub-circuit configured to turn it conductive between a first electrode of the driving transistor and a power supply terminal in response to a first light emitting control signal, and transmit the data voltage signal to the gate of the driving transistor in response to a second light emitting control signal.
    Type: Application
    Filed: February 24, 2023
    Publication date: March 27, 2025
    Inventors: Yao HUANG, Li ZHU, Jia LIU
  • Patent number: 12260161
    Abstract: A method for establishing a variation model related to circuit characteristics for performing circuit simulation includes: performing first, second, third, and fourth Monte Carlo simulation operations according to a first netlist file and predetermined process model data to generate a first, a second, a third, and a fourth performance simulation results, respectively, where the first netlist file is arranged to indicate a basic circuit in a circuit system; and execute a performance simulation results expansion procedure according to the first, the second, the third, and the fourth performance simulation results to generate a plurality of performance simulation results to establish the variation model, for performing the circuit simulation to generate at least one circuit simulation result according to one or more performance simulation results among the plurality of performance simulation results, where the number of the plurality of performance simulation results is greater than four.
    Type: Grant
    Filed: March 13, 2022
    Date of Patent: March 25, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Wei-Ming Huang, Szu-Ying Huang, Mei-Li Yu, Yu-Lan Lo
  • Patent number: 12261082
    Abstract: The present disclosure describes a semiconductor device with a nitrided capping layer and methods for forming the same. One method includes forming a first conductive structure in a first dielectric layer on a substrate, depositing a second dielectric layer on the first conductive structure and the first dielectric layer, and forming an opening in the second dielectric layer to expose the first conductive structure and a portion of the first dielectric layer. The method further includes forming a nitrided layer on a top portion of the first conductive structure, a top portion of the portion of the first dielectric layer, sidewalls of the opening, and a top portion of the second dielectric layer, and forming a second conductive structure in the opening, where the second conductive structure is in contact with the nitrided layer.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: March 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Chin Chang, Lin-Yu Huang, Shuen-Shin Liang, Sheng-Tsung Wang, Cheng-Chi Chuang, Chia-Hung Chu, Tzu Pei Chen, Yuting Cheng, Sung-Li Wang
  • Patent number: 12260392
    Abstract: Provided are methods, systems, and computer program products for verifying a card image file. A system may include at least one processor programmed or configured to parse a card image file to determine card data represented by the card image file, generate a plurality of simulated payment transactions based on the card data, each simulated payment transaction including simulated transaction data, issue a plurality of commands to the payment device emulator, the plurality of commands based on the simulated transaction data for the plurality of simulated payment transactions, receive a plurality of command responses generated by the payment device emulator based on the plurality of commands, and verify the card image file based on the plurality of command responses and the card data.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: March 25, 2025
    Assignee: Visa International Service Association
    Inventors: Alexandre Pierre, Carl Smith, Kiat Chun Tan, Baoxiang Kang, Li Huang, Yuexi Chen
  • Patent number: 12262410
    Abstract: This disclosure relates to wireless communication methods that utilize and enable the communication of an indication of a listen-before-talk (LBT) mode from a wireless access node to a mobile station.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: March 25, 2025
    Assignee: ZTE Corporation
    Inventors: Li Zhang, He Huang, Eswar Kalyan Vutukuri
  • Patent number: 12261092
    Abstract: A semiconductor package includes a semiconductor device, an encapsulating material, a redistribution structure, and an adhesive residue. The encapsulating material encapsulates a first part of a side surface of the semiconductor device. The redistribution structure is disposed over the semiconductor device and a first side of the encapsulating material. The adhesive residue is disposed over a second side of the encapsulating material opposite to the first side and surrounding the semiconductor device, wherein the adhesive residue encapsulates a second part of the side surface of the semiconductor device.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Ming-Hung Tseng, Yen-Liang Lin, Ban-Li Wu, Hsiu-Jen Lin, Teng-Yuan Lo, Hao-Yi Tsai
  • Publication number: 20250094411
    Abstract: The present disclosure relates to adaptively overlapping redo writes. A log writer, while operating in a thin mode, may assign a first log writer group of a plurality of log writer groups to write one or more first redo log records to an online redo log in response to determining that a pipelining parameter is satisfied. The thin mode may be associated with one or more target sizes that are less than one or more target sizes associated with a thick mode. The log writer may determine to operate the thick mode based at least in part on at least a portion of the plurality of log writer groups being unavailable to write one or more second redo log records to the online redo log.
    Type: Application
    Filed: March 7, 2024
    Publication date: March 20, 2025
    Inventors: Graham Ivey, Shih-Yu Huang, Yunrui Li, Shampa Chakravarty
  • Publication number: 20250098261
    Abstract: Semiconductor structures and methods of forming the same are provided. In an embodiment, an exemplary method includes depositing a dummy gate material layer over a first fin-shaped active region, patterning the dummy gate material layer to form a dummy gate electrode, wherein the dummy gate electrode has a footing feature at an interface between the first fin-shaped active region and the dummy gate electrode, oxidizing the footing feature and a sidewall portion of the dummy gate electrode to form a dielectric gate spacer, and replacing a remaining portion of the dummy gate electrode with a gate structure.
    Type: Application
    Filed: January 27, 2024
    Publication date: March 20, 2025
    Inventors: Yi-Hong Wang, Hui-Hsuan Kung, Yao-Zhong Dong, Yi-Li Huang, Yi-Chen Li