Abstract: A device and method and computer readable medium for resisting downgrade attacks. User equipment includes a memory having instructions stored thereon and a processor configured to execute the instructions stored on the memory to cause the user equipment to perform the following operations: determining a security authentication type when the user equipment is connected to a network device for the first time; and in response to determining that the security authentication type when the user equipment is connected to the network device for the first time is WPA3, applying the only-WPA3 rule; where the only-WPA3 rule only allows the user equipment to use WPA3 to access the network device, and refuses the user equipment to use other security authentication types with lower security than WPA3 to access the network device.

Abstract: The present disclosure provides a method for induced differentiation of an extended pluripotent stem cell (EPSC) into a cardiomyocyte and use thereof, and belongs to the technical field of biomedicine. A reagent used for the induced differentiation is a culture medium having definite chemical components, which can obtain cardiomyocytes having high purity and stable between-batch differentiation efficiency. Compared with cardiomyocytes differentiated from existing pluripotent stem cells, the cardiomyocyte obtained has strong early proliferation ability, and more cell number can be obtained; after extended culture and construction into engineering heart microtissue, maturity is higher, the structure is more regularly arranged, and functional contractility is enhanced. Therefore, the present disclosure is a suitable for mechanism research of heart diseases, drug screening, and cell therapy, and thus has excellent practical application value.

Abstract: This application discloses a mini program production method performed at a terminal. The method includes: displaying a mini program production interface including a panel region and an editing region; receiving an editing operation of moving one or more target basic UI elements from the panel region to the editing region; generating a program interface of the mini program in the editing region using the one or more target basic UI elements; performing data binding between the one or more target basic UI elements and corresponding data associated with the mini program in the program interface; generating the mini program according to the one or more target basic UI elements and the corresponding data in the program interface; and transmitting the mini program to a server associated with a host application program, wherein the server is configured to publish the mini program on the host application program for execution.

Abstract: An integrated circuit device having functional circuitry driven by a clock signal includes onboard clock generation circuitry. The clock generation circuitry includes an input configured to accept a frequency reference signal, at least one variable loading capacitor coupled to the input for converting the crystal resonator signal into a calibrated clock signal, and calibration circuitry configured to calibrate the at least one variable loading capacitor based on a reference voltage. The input configured to accept a frequency reference signal may be configured to accept a crystal resonator signal.

Abstract: The present disclosure provides to process intravascular ultrasound (IVUS) images to identify key frames such as the proximal key frame, a distal key frame, and a minimal key frame from the IVUS images based on the raw lumen area, vessel area, and plaque burden. Ones of the key frames can be re-identified based on manipulation of other ones of the key frames.

Abstract: Disclosed is a system and a method for information distribution. The system comprises: a server for generating a group key and its corresponding key deriving parameter, wherein the server encrypts sensitive contents by using the group key to obtain encrypted information; and terminals configured to receive the encrypted information through an open channel, extract the group key, then decrypt the encrypted information by using the group key to obtain the original content. In the group forming process, each terminal encrypts its private identifier using the public key and submits the ciphertext to the server. In information distribution process, the server transmits the ciphertext of sensitive contents and the key deriving parameter to the terminals via open channel Because private information available only to respective group members is required for calculating the group key, this mechanism ensures that the sensitive content can be transmitted securely on the open channel.

Abstract: A semiconductor structure includes two source/drain features spaced apart from each other, at least one channel feature disposed between the two source/drain features, a gate dielectric layer disposed on the at least one channel feature, a gate feature, and an electrically conductive capping feature. The gate feature is disposed on the gate dielectric layer and has a first surface, a second surface which is opposite to the first surface, and an interconnect surface which interconnects the first and second surfaces. The electrically conductive capping feature is in direct contact with one of the first and second surfaces of the gate feature, and extends beyond the interconnect surface of the gate feature. Methods for manufacturing the semiconductor structure are also disclosed.

Abstract: An integrated circuit device having functional circuitry driven by a clock signal includes onboard clock generation circuitry. The clock generation circuitry includes an input configured to accept a frequency reference signal, at least one variable loading capacitor coupled to the input for converting the crystal resonator signal into a calibrated clock signal, and calibration circuitry configured to calibrate the at least one variable loading capacitor based on a reference voltage. The input configured to accept a frequency reference signal may be configured to accept a crystal resonator signal.

Abstract: An integrated circuit device, having functional circuitry driven by a clock signal, includes a first clock path for accepting an external clock signal where the first clock path includes first biasing circuitry configured to controllably pass the external clock signal, a second clock path for accepting an external frequency reference signal where the second clock path includes internal clock generation circuitry configured to generate an internal clock signal from the external frequency reference signal and second biasing circuitry configured to controllably pass the external frequency reference signal to the internal clock generation circuitry, and selector circuitry configured to select, based on user input, a clock output to drive the functional circuitry of the integrated circuit device. The clock output is selected from between (i) an output of the first clock path, and (ii) an output of the second clock path.

Abstract: An integrated circuit device having functional circuitry driven by a clock signal includes onboard clock generation circuitry. The clock generation circuitry includes an input configured to accept a frequency reference signal, at least one variable loading capacitor coupled to the input for converting the crystal resonator signal into a calibrated clock signal, and calibration circuitry configured to calibrate the at least one variable loading capacitor based on a reference voltage. The input configured to accept a frequency reference signal may be configured to accept a crystal resonator signal.

Abstract: An integrated circuit device, having functional circuitry driven by a clock signal, includes a first clock path for accepting an external clock signal where the first clock path includes first biasing circuitry configured to controllably pass the external clock signal, a second clock path for accepting an external frequency reference signal where the second clock path includes internal clock generation circuitry configured to generate an internal clock signal from the external frequency reference signal and second biasing circuitry configured to controllably pass the external frequency reference signal to the internal clock generation circuitry, and selector circuitry configured to select, based on user input, a clock output to drive the functional circuitry of the integrated circuit device. The clock output is selected from between (i) an output of the first clock path, and (ii) an output of the second clock path.

Abstract: The present disclosure relates to a power factor correction circuit, a control method, and an electrical appliance. The power factor correction circuit may include: a power regulation branch, including a first switching unit, a second switching unit and a branch sampling resistor connected in series sequentially; an inductive branch, connected between an AC power source and a power regulation branch; a rectifier branch, including a first rectifier unit and a second rectifier unit, the rectifier branch may include a main line sampling resistor; a capacitance branch; a control circuit sampling a branch current flowing through each of the branch sampling resistors and a main line current flowing through the main line sampling resistor respectively, and controlling the switching of each power regulation branch sequentially. With the branch sampling resistor and the main line sampling resistor, the overall cost of the power factor correction circuit may be reduced.

Abstract: The present invention relates to a compound having a benzo seven-membered ring structure, and a preparation method therefor, and use thereof. The compound has a structure as represented by formula (I). Provided is use of the compound having the structure and prepared with the preparation method of the present invention, enantiomers, diastereomers, racemates and mixtures thereof of the compound, as well as chemically acceptable salts, crystalline hydrates and solvent mixtures of the compound and the enantiomers, diastereomers, racemates and mixtures thereof of the compound in the preparation of drugs for treating BET Bromodomain BRD4 activity or expression level related diseases.

Abstract: Methods for treating a neurological disorder, such as a traumatic spinal cord injury or traumatic brain injury, or a disorder such as Parkinson's disease or multiple sclerosis are provided. Such methods include administering a therapeutically effective amount of Gsx1 protein (such as a Gsx1-cell penetrating peptide fusion protein), or a nucleic acid molecule encoding such a protein (for example as part of a viral vector), thereby treating the neurological disorder.

Abstract: An intra frame bit rate allocation method being performed by a computer device comprising at least one processor, includes when a current frame of picture is an intra frame in a specified frame sequence, pre-encoding the current frame of picture; calculating a corresponding intra frame encoding cost and an inter frame encoding cost of the pre-encoding; and allocating an intra frame bit rate according to the calculated intra frame encoding cost and the inter frame encoding cost.

Abstract: A wind power converter device is provided. The wind power converter device includes grid side converters, generator side converters and a DC bus module. Each of the grid side converters includes grid side outputs electrically coupled to a grid and a first and a second DC inputs. Each two of the neighboring grid side converters are connected in series at the second and the first DC inputs. Each of the generator side converters includes generator side inputs electrically coupled to a generator device and a first and a second DC outputs. Each two of the neighboring generator side converters are coupled in series at the second and the first DC outputs. The DC bus module is electrically coupled between the grid side converters and the generator side converters.