Patents by Inventor Li-Cheng Chu

Li-Cheng Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240313626
    Abstract: A power supply circuit includes a power switch circuit, a slew rate sensing circuit, a reference voltage generator circuit, and a first protection circuit. The power switch circuit is configured to generate an output current to an output terminal of power switch circuit according to an input voltage at an input terminal. The slew rate sensing circuit is configured to generate a sensing voltage according to an output voltage at the output terminal of the power switch circuit. The reference voltage generator circuit is configured to generate a reference voltage according to the input voltage. The first protection circuit is configured to generate a control voltage according to the reference voltage and the sensing voltage to control a turned-on degree of the power switch circuit.
    Type: Application
    Filed: March 3, 2024
    Publication date: September 19, 2024
    Inventors: Li Cheng CHU, Leaf CHEN
  • Publication number: 20240282769
    Abstract: The present disclosure discloses a common source transistor apparatus. The common source transistor unit includes a diffusion area, poly-silicon gates and a source/bulk ring. The diffusion area includes source/bulk areas and drain areas. Each of the poly-silicon gates traverses the diffusion areas between one of the source/bulk areas and one of the drain areas and includes a low-voltage gate part, a first high-voltage gate part and a second high-voltage gate part. The low-voltage gate part includes 2N low-voltage poly-silicon gates. Each of the first and the second high-voltage gate parts is disposed at a side of the low-voltage gate part having one of the source/bulk areas disposed therebetween and includes N+1 high-voltage poly-silicon gates. The source/bulk ring surrounds the diffusion and the poly-silicon gates and is coupled to the source/bulk area. An isolation ring surrounds the common source transistor unit. A substrate ring surrounds the isolation ring.
    Type: Application
    Filed: February 16, 2024
    Publication date: August 22, 2024
    Inventors: HUI-MIN HUANG, CHIEH-PIN CHANG, LI-CHENG CHU, CHUN-CHIEN TSAI, LEAF CHEN
  • Publication number: 20240223083
    Abstract: A power supply circuit includes a voltage generator circuit, an overcurrent protection circuit, and a power switch circuit. The voltage generator circuit is configured to generate a first voltage. The overcurrent protection circuit is configured to generate a comparison voltage according to a reference voltage and a sensing voltage. A voltage clamping circuit in the overcurrent protection circuit is configured to generate a second voltage according to the first voltage and the comparison voltage. The power switch circuit is configured to generate an output current according to the second voltage and an input voltage. The sensing voltage is generated at a node in the power switch circuit and is associated with the output current.
    Type: Application
    Filed: September 22, 2023
    Publication date: July 4, 2024
    Inventor: Li Cheng CHU
  • Patent number: 11901885
    Abstract: A PWM-based (pulse width modulation-based) overcurrent protection circuit and an operating method for the same are provided. The PWM-based overcurrent protection circuit includes a pulse-width-modulation circuit that is connected to a charge pump and a load detection circuit of a power-switch circuit. The charge pump outputs a voltage to the power-switch circuit according to a clock-voltage signal. The load detection circuit is used to detect an overcurrent flowing through the power-switch circuit according to a load at an output end of the power-switch circuit. Thus, when the load detection circuit detects the overcurrent, the pulse-width-modulation circuit controls a duty-cycle width of the charge pump, so as to suppress the voltage outputted by the charge pump. Therefore, an output voltage from the power-switch circuit can be corrected for preventing or reducing the overcurrent.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: February 13, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Li-Cheng Chu
  • Patent number: 11750000
    Abstract: An electronic device having a universal serial bus (USB) power delivery function includes a connector, an electrostatic discharge (ESD) protection circuit, a power reception notification circuit, and a control circuit. The connector is coupled to a USB host. The connector includes a configuration channel (CC) pin. The power reception notification circuit is configured to turn on, in response to an enable signal, a pull-down path of a pull-down circuit of the ESD protection circuit. The configuration channel pin generates a pull-down voltage through the pull-down path of the pull-down circuit when the pull-down path is turned on. The control circuit is configured to send the enable signal to the power reception notification circuit when a trigger signal that meets a power reception condition is detected. The control circuit controls the connector to draw power from the USB host when the pull-down voltage of the connector is greater than a pull-down threshold.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: September 5, 2023
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ya-Hsuan Sung, Leaf Chen, Li-Cheng Chu
  • Patent number: 11716077
    Abstract: A switch control circuit includes a power switch, a first protection unit, and a second protection unit. The power switch has a first terminal coupled to a first voltage terminal for receiving a first voltage, a second terminal coupled to a second voltage terminal for receiving a second voltage, and a control terminal receives a control voltage. In a first mode, the control voltage is greater than the first voltage. In a second mode, when a voltage of the second voltage terminal is smaller than a first reference voltage, the first protection unit pulls down the control voltage to reduce a current flowing through the power switch. When the voltage of the second voltage terminal is smaller than the second reference voltage, the second protection unit pulls down the control voltage to a ground voltage.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: August 1, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Li Cheng Chu
  • Publication number: 20230090107
    Abstract: A switch control circuit includes a power switch, a first protection unit, and a second protection unit. The power switch has a first terminal coupled to a first voltage terminal for receiving a first voltage, a second terminal coupled to a second voltage terminal for receiving a second voltage, and a control terminal receives a control voltage. In a first mode, the control voltage is greater than the first voltage. In a second mode, when a voltage of the second voltage terminal is smaller than a first reference voltage, the first protection unit pulls down the control voltage to reduce a current flowing through the power switch. When the voltage of the second voltage terminal is smaller than the second reference voltage, the second protection unit pulls down the control voltage to a ground voltage.
    Type: Application
    Filed: March 8, 2022
    Publication date: March 23, 2023
    Inventor: LI CHENG CHU
  • Patent number: 11569813
    Abstract: The present invention discloses a USB signal output circuit having reverse current prevention mechanism. A switch circuit turns on when a switch control terminal receives a first high level voltage to output a signal from a signal input terminal to a signal output terminal. A first voltage pull-low circuit includes a passive-component high-pass filter circuit and a discharging circuit. The passive-component high-pass filter circuit couples an output terminal voltage of the signal output terminal to a pull-low control terminal. The discharging circuit turns on when a voltage of the pull-low control terminal is larger than a predetermined voltage level to discharge the switch control terminal to pull the switch control terminal to a second high level voltage. A second voltage pull-low circuit pulls the switch control terminal to a low level voltage when the output terminal voltage is larger than a reference voltage and does not have a glitch.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: January 31, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Li-Cheng Chu, Leaf Chen
  • Publication number: 20220166241
    Abstract: An electronic device having a universal serial bus (USB) power delivery function includes a connector, an electrostatic discharge (ESD) protection circuit, a power reception notification circuit, and a control circuit. The connector is coupled to a USB host. The connector includes a configuration channel (CC) pin. The power reception notification circuit is configured to turn on, in response to an enable signal, a pull-down path of a pull-down circuit of the ESD protection circuit. The configuration channel pin generates a pull-down voltage through the pull-down path of the pull-down circuit when the pull-down path is turned on. The control circuit is configured to send the enable signal to the power reception notification circuit when a trigger signal that meets a power reception condition is detected. The control circuit controls the connector to draw power from the USB host when the pull-down voltage of the connector is greater than a pull-down threshold.
    Type: Application
    Filed: November 15, 2021
    Publication date: May 26, 2022
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ya-Hsuan Sung, Leaf Chen, Li-Cheng Chu
  • Publication number: 20220021382
    Abstract: A PWM-based (pulse width modulation-based) overcurrent protection circuit and an operating method for the same are provided. The PWM-based overcurrent protection circuit includes a pulse-width-modulation circuit that is connected to a charge pump and a load detection circuit of a power-switch circuit. The charge pump outputs a voltage to the power-switch circuit according to a clock-voltage signal. The load detection circuit is used to detect an overcurrent flowing through the power-switch circuit according to a load at an output end of the power-switch circuit. Thus, when the load detection circuit detects the overcurrent, the pulse-width-modulation circuit controls a duty-cycle width of the charge pump, so as to suppress the voltage outputted by the charge pump. Therefore, an output voltage from the power-switch circuit can be corrected for preventing or reducing the overcurrent.
    Type: Application
    Filed: July 14, 2021
    Publication date: January 20, 2022
    Inventor: LI-CHENG CHU
  • Publication number: 20210297076
    Abstract: The present invention discloses a USB signal output circuit having reverse current prevention mechanism. A switch circuit turns on when a switch control terminal receives a first high level voltage to output a signal from a signal input terminal to a signal output terminal. A first voltage pull-low circuit includes a passive-component high-pass filter circuit and a discharging circuit. The passive-component high-pass filter circuit couples an output terminal voltage of the signal output terminal to a pull-low control terminal. The discharging circuit turns on when a voltage of the pull-low control terminal is larger than a predetermined voltage level to discharge the switch control terminal to pull the switch control terminal to a second high level voltage. A second voltage pull-low circuit pulls the switch control terminal to a low level voltage when the output terminal voltage is larger than a reference voltage and does not have a glitch.
    Type: Application
    Filed: March 19, 2021
    Publication date: September 23, 2021
    Inventors: LI-CHENG CHU, LEAF CHEN
  • Patent number: 10160638
    Abstract: A semiconductor structure may include a first device having first surface with a first bonding layer formed thereon and a second device having a first surface with a second bonding layer formed thereon. The first bonding layer may provide an electrically conductive path to at least one electrical device in the first device. The second bonding layer may provide an electrically conductive path to at least one electrical device in the second device. One of the first or the second devices may include MEMS electrical devices. The first and/or the second bonding layers may be formed of a getter material, which may provide absorption for outgassing.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Cheng Chu, Ping-Yin Liu, Xin-Hua Huang, Yuan-Chih Hsieh, Lan-Lin Chao, Chun-Wen Cheng
  • Patent number: 10119909
    Abstract: A biological sensing structure includes a mesa integrally connected a portion of a substrate, wherein the mesa has a top surface and a sidewall surface adjacent to the top surface. The biological sensing structure includes a first light reflecting layer over the top surface and the sidewall surface of the mesa. The biological sensing structure includes a filling material surrounding the mesa, wherein the mesa protrudes from the filling material. The biological sensing structure includes a stop layer over the filling material and a portion of the first light reflecting layer. The biological sensing structure includes a second light reflecting layer over a portion of the stop layer and a portion of the top surface of the mesa. The biological sensing structure includes an opening in the second light reflecting layer to partially expose the top surface of the mesa.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: November 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Li-Cheng Chu, Ming-Tung Wu, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai
  • Patent number: 9873610
    Abstract: A MEMS device is described. The device includes a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, a semiconductor substrate including a second bonding layer, and a cap including a third bonding layer, the cap coupled to the semiconductor substrate by bonding the second bonding layer to the third bonding layer. The first bonding layer includes silicon, the semiconductor substrate is electrically coupled to the MEMS substrate by bonding the first bonding layer to the second bonding layer, and the MEMS substrate is hermetically sealed between the cap and the semiconductor substrate.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: January 23, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Hsien Lin, Chia-Hua Chu, Li-Cheng Chu, Yuan-Chih Hsieh, Chun-Wen Cheng
  • Patent number: 9708179
    Abstract: In some embodiments, the present disclosure relates to a MEMs (microelectromechanical system) package device having a getter layer. The MEMs package includes a first substrate having a cavity located within an upper surface of the first substrate. The cavity has roughened interior surfaces. A getter layer is arranged onto the roughened interior surfaces of the cavity. A bonding layer is arranged on the upper surface of the first substrate on opposing sides of the cavity, and a second substrate bonded to the first substrate by the bonding layer. The second substrate is arranged over the cavity. The roughened interior surfaces of the cavity enables more effective absorption of residual gases, thereby increasing the efficiency of a gettering process.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: July 18, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yuan-Chih Hsieh, Li-Cheng Chu, Hung-Hua Lin, Chih-Jen Chan, Lan-Lin Chao
  • Patent number: 9611141
    Abstract: The present disclosure provides a device having a doped active region disposed in a substrate. The doped active region having an elongate shape and extends in a first direction. The device also includes a plurality of first metal gates disposed over the active region such that the first metal gates each extend in a second direction different from the first direction. The plurality of first metal gates includes an outer-most first metal gate having a greater dimension measured in the second direction than the rest of the first metal gates. The device further includes a plurality of second metal gates disposed over the substrate but not over the doped active region. The second metal gates contain different materials than the first metal gates. The second metal gates each extend in the second direction and form a plurality of respective N/P boundaries with the first metal gates.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: April 4, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Li-Cheng Chu, Hung-Hua Lin, Shang-Ying Tsai, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Patent number: 9472504
    Abstract: The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a via structure includes a via having via sidewall surfaces defined by a semiconductor substrate. The via sidewall surfaces have a first portion and a second portion. A conductive layer is disposed in the via on the first portion of the via sidewall surfaces, and a dielectric layer is disposed on the second portion of the via sidewall surfaces. The dielectric layer is disposed between the second portion of the via sidewall surfaces and the conductive layer. In an example, the dielectric layer is an oxide layer.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: October 18, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yuan-Chih Hsieh, Li-Cheng Chu, Ming-Tung Wu, Ping-Yin Liu, Lan-Lin Chao, Chia-Shiung Tsai
  • Publication number: 20160299068
    Abstract: A biological sensing structure includes a mesa integrally connected a portion of a substrate, wherein the mesa has a top surface and a sidewall surface adjacent to the top surface. The biological sensing structure includes a first light reflecting layer over the top surface and the sidewall surface of the mesa. The biological sensing structure includes a filling material surrounding the mesa, wherein the mesa protrudes from the filling material. The biological sensing structure includes a stop layer over the filling material and a portion of the first light reflecting layer. The biological sensing structure includes a second light reflecting layer over a portion of the stop layer and a portion of the top surface of the mesa. The biological sensing structure includes an opening in the second light reflecting layer to partially expose the top surface of the mesa.
    Type: Application
    Filed: June 23, 2016
    Publication date: October 13, 2016
    Inventors: Hung-Hua Lin, Li-Cheng Chu, Ming-Tung Wu, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai
  • Publication number: 20160229693
    Abstract: A bond free of an anti-stiction layer and bonding method is disclosed. An exemplary method includes forming a first bonding layer; forming an interlayer over the first bonding layer; forming an anti-stiction layer over the interlayer; and forming a liquid from the first bonding layer and interlayer, such that the anti-stiction layer floats over the first bonding layer. A second bonding layer can be bonded to the first bonding layer while the anti-stiction layer floats over the first bonding layer, such that a bond between the first and second bonding layers is free of the anti-stiction layer.
    Type: Application
    Filed: December 9, 2014
    Publication date: August 11, 2016
    Inventors: Ping-Yin Liu, Li-Cheng Chu, Hung-Hua Lin, Shang-Ying Tsai, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Patent number: 9377401
    Abstract: A biological sensing structure includes a mesa integrally connected a portion of a substrate, wherein the mesa has a top surface and a sidewall surface adjacent to the top surface. The biological sensing structure includes a first light reflecting layer over the top surface and the sidewall surface of the mesa. The biological sensing structure includes a filling material surrounding the mesa, wherein the mesa protrudes from the filling material. The biological sensing structure includes a stop layer over the filling material and a portion of the first light reflecting layer. The biological sensing structure includes a second light reflecting layer over a portion of the stop layer and a portion of the top surface of the mesa. The biological sensing structure includes an opening in the second light reflecting layer to partially expose the top surface of the mesa.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: June 28, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Li-Cheng Chu, Ming-Tung Wu, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai