Abstract: A communication device for handling a device-to-device (D2D) communication comprises a storage unit for storing instructions and a processing means coupled to the storage unit. The processing means is configured to execute the instructions stored in the storage unit. The instructions comprises receiving a D2D grant from a network in a first subframe; and transmitting an acknowledgement in response to the D2D grant to the network in a second subframe.

Abstract: A semiconductor device having integrated MOSFET and Schottky diode includes a substrate having a MOSFET region and a Schottky diode region defined thereon; a plurality of first trenches formed in the MOSFET region; and a plurality of second trenches formed in the Schottky diode region. The first trenches respectively including a first insulating layer formed over the sidewalls and bottom of the first trench and a first conductive layer filling the first trench serve as a trenched gate of the trench MOSFET. The second trenches respectively include a second insulating layer formed over the sidewalls and bottom of the second trench and a second conductive layer filling the second trench. A depth and a width of the second trenches are larger than that of the first trenches; and a thickness of the second insulating layer is larger than that of the first insulating layer.

Abstract: An integrated structure of an IGBT and a diode includes a plurality of doped cathode regions, and a method of forming the same is provided. The doped cathode regions are stacked in a semiconductor substrate, overlapping and contacting with each other. As compared with other doped cathode regions, the higher a doped cathode region is disposed, the larger implantation area the doped cathode region has. The doped cathode regions and the semiconductor substrate have different conductive types, and are applied as a cathode of the diode and a collector of the IGBT. The stacked doped cathode regions can increase the thinness of the cathode, and prevent the wafer from being overly thinned and broken.

Abstract: A semiconductor structure including a substrate, an insulating layer, a composite pad structure, a passivation layer, and a bump is provided. A circuit structure is disposed on the substrate. The insulating layer covers the substrate and has a first opening exposing the circuit structure. The composite pad structure includes a first conductive layer, a barrier layer, and a second conductive layer which are sequentially disposed. The composite pad structure is disposed on the insulating layer and fills the first opening to electrically connect to the circuit structure. The passivation layer covers the composite pad structure and has a second opening exposing the composite pad structure. The bump fills the second opening and electrically connects to the composite pad structure.

Abstract: A power semiconductor device includes a backside metal layer, a substrate formed on the backside metal layer, a semiconductor layer formed on the substrate, and a frontside metal layer. The semiconductor layer includes a first trench structure including a gate oxide layer formed around a first trench with poly-Si implant, a second trench structure including a gate oxide layer formed around a second trench with poly-Si implant, a p-base region formed between the first trench structure and the second trench structure, a plurality of n+ source region formed on the p-base region and between the first trench structure and the second trench structure, a dielectric layer formed on the first trench structure, the second trench structure, and the plurality of n+ source region. The frontside metal layer is formed on the semiconductor layer and filling gaps formed between the plurality of n+ source region on the p-base region.

Abstract: A trench semiconductor device and a method of making the same are provided. The trench semiconductor device includes a trench MOS device and a trench ESD protection device. The trench ESD protection device is electrically connected between the gate electrode and source electrode of the trench MOS device so as to provide ESD protection. The fabrication of the ESD protection device is integrated into the process of the trench MOS device, and therefore no extra mask is required to define the doped regions of the trench ESD protection device. Consequently, the trench semiconductor device is advantageous for its simplified manufacturing process and low cost.

Abstract: A method for forming semiconductor device, which simultaneously forms a trench MOS transistor device, and an embedded schottky barrier diode (SBD) device in a semiconductor substrate. The embedded SBD device has lower forward voltage drop, which reduces power dissipation. In addition, the voltage bearing ability may be modified easily by virtue of altering the dopant concentration or the width of the voltage bearing dopant region, or the thickness of epitaxial silicon layer. Furthermore, extra cost of purchasing SBD diode may be saved.

Abstract: An integrated structure of an IGBT and a diode includes a plurality of doped cathode regions, and a method of forming the same is provided. The doped cathode regions are stacked in a semiconductor substrate, overlapping and contacting with each other. As compared with other doped cathode regions, the higher a doped cathode region is disposed, the larger implantation area the doped cathode region has. The doped cathode regions and the semiconductor substrate have different conductive types, and are applied as a cathode of the diode and a collector of the IGBT. The stacked doped cathode regions can increase the thinness of the cathode, and prevent the wafer from being overly thinned and broken.

Abstract: A semiconductor device having integrated MOSFET and Schottky diode includes a substrate having a MOSFET region and a Schottky diode region defined thereon; a plurality of first trenches formed in the MOSFET region; and a plurality of second trenches formed in the Schottky diode region. The first trenches respectively including a first insulating layer formed over the sidewalls and bottom of the first trench and a first conductive layer filling the first trench serve as a trenched gate of the trench MOSFET. The second trenches respectively include a second insulating layer formed over the sidewalls and bottom of the second trench and a second conductive layer filling the second trench. A depth and a width of the second trenches are larger than that of the first trenches; and a thickness of the second insulating layer is larger than that of the first insulating layer.

Abstract: A semiconductor structure including a substrate, an insulating layer, a composite pad structure, a passivation layer, and a bump is provided. A circuit structure is disposed on the substrate. The insulating layer covers the substrate and has a first opening exposing the circuit structure. The composite pad structure includes a first conductive layer, a barrier layer, and a second conductive layer which are sequentially disposed. The composite pad structure is disposed on the insulating layer and fills the first opening to electrically connect to the circuit structure. The passivation layer covers the composite pad structure and has a second opening exposing the composite pad structure. The bump fills the second opening and electrically connects to the composite pad structure.

Abstract: A trench semiconductor device and a method of making the same are provided. The trench semiconductor device includes a trench MOS device and a trench ESD protection device. The trench ESD protection device is electrically connected between the gate electrode and source electrode of the trench MOS device so as to provide ESD protection. The fabrication of the ESD protection device is integrated into the process of the trench MOS device, and therefore no extra mask is required to define the doped regions of the trench ESD protection device. Consequently, the trench semiconductor device is advantageous for its simplified manufacturing process and low cost.

Abstract: A method for forming semiconductor device, which simultaneously forms a trench MOS transistor device, and an embedded schottky barrier diode (SBD) device in a semiconductor substrate. The embedded SBD device has lower forward voltage drop, which reduces power dissipation. In addition, the voltage bearing ability may be modified easily by virtue of altering the dopant concentration or the width of the voltage bearing dopant region, or the thickness of epitaxial silicon layer. Furthermore, extra cost of purchasing SBD diode may be saved.

Abstract: A method for providing a buffer status report in a mobile communication network is implemented between a base station and a user equipment. When data arrives to buffers of the user equipment and the priority of a logical channel for the data is higher than those of other logical channels for existing data in the buffers, a short buffer status report associated with the buffer of a logical channel group corresponding to the arrival data is triggered. The user equipment is based on obtained resources allocated by the base station to fill all data of the buffer of the logical channel group in a Protocol Data Unit. If all data of the buffer of the logical channel group corresponding to the arrival data can be completely filled in the Protocol Data Unit, the short buffer status report is canceled. Otherwise, the user equipment transmits the short buffer status report.

Abstract: A power semiconductor device includes a backside metal layer, a substrate formed on the backside metal layer, a semiconductor layer formed on the substrate, and a frontside metal layer. The semiconductor layer includes a first trench structure including a gate oxide layer formed around a first trench with poly-Si implant, a second trench structure including a gate oxide layer formed around a second trench with poly-Si implant, a p-base region formed between the first trench structure and the second trench structure, a plurality of n+ source region formed on the p-base region and between the first trench structure and the second trench structure, a dielectric layer formed on the first trench structure, the second trench structure, and the plurality of n+ source region. The frontside metal layer is formed on the semiconductor layer and filling gaps formed between the plurality of n+ source region on the p-base region.

Abstract: A method of forming a power device includes providing a substrate, a semiconductor layer having at least a trench and being disposed on the substrate, a gate insulating layer covering the semiconductor layer, and a conductive material disposed in the trench, performing an ion implantation process to from a body layer, performing a tilted ion implantation process to from a heavy doped region, forming a first dielectric layer overall, performing a chemical mechanical polishing process until the body layer disposed under the heavy doped region is exposed to form source regions on the opposite sides of the trench, and forming a source trace directly covering the source regions disposed on the opposite sides of the trench.

Abstract: A method of forming a power device includes providing a substrate, a semiconductor layer having at least a trench and being disposed on the substrate, a gate insulating layer covering the semiconductor layer, and a conductive material disposed in the trench, performing an ion implantation process to from a body layer, performing a tilted ion implantation process to from a heavy doped region, forming a first dielectric layer overall, performing a chemical mechanical polishing process until the body layer disposed under the heavy doped region is exposed to form source regions on the opposite sides of the trench, and forming a source trace directly covering the source regions disposed on the opposite sides of the trench.

Abstract: A frame format for random access response of wireless communication transmission is provided. The frame format comprises a header segment and a variable length data segment. The header segment includes one or more random access response subheader and 0 to N load control subheader. The variable length data segment including one or more random access response data payload corresponding to the one or more random access response subheader. The one or more random access response subheader includes a status indication field to represent a last random access response subheader, a load control subheader, a random access response data payload with a T-CRNTI field, or a random access response data payload without a T-CRNTI field.

Abstract: A method for providing a buffer status report in a mobile communication network is implemented between a base station and a user equipment. When data arrives to buffers of the user equipment and the priority of a logical channel for the data is higher than those of other logical channels for existing data in the buffers, a short buffer status report associated with the buffer of a logical channel group corresponding to the arrival data is triggered. The user equipment is based on obtained resources allocated by the base station to fill all data of the buffer of the logical channel group in a Protocol Data Unit. If all data of the buffer of the logical channel group corresponding to the arrival data can be completely filled in the Protocol Data Unit, the short buffer status report is canceled. Otherwise, the user equipment transmits the short buffer status report.

Abstract: An electrical host system includes a host and an expandable optical disk recording and playing device. The expandable optical disk recording and playing device includes an expanding interface module, an expanding interface, a storage interface module, an output interface module and a CODEC module. The expanding interface module connects to the expanding interface and the host. The storage interface module connects to a storage device. The CODEC module encodes, decodes or transcodes an audio/video source to generate audio/video data, wherein the audio/video source is inputted from the host through the expanding interface and the expanding interface module. The audio/video data are outputted through the output interface module, or through the storage interface module to the storage device.

Abstract: A multimedia computer system and method is disclosed. A medium device of the computer system, like an optical disc loader, has a built-in function of multimedia decoding for supporting the computer system to work under a normal mode and a playback mode. In the normal mode, the medium device does not decode, and north/south bridges of the computer arrange data exchange and access between the medium device, a CPU, and a memory of the computer system. In the playback mode, the medium device performs multimedia decoding itself for obtaining video data from the medium, and the video data are sent to a display of the computer system by the north bridge. Therefore, in this playback mode, other circuits like the south bridge, CPU and memory can be powered down to an idle status, and a low power consumption multimedia broadcast is realized.