Patents by Inventor Li Chi Chang
Li Chi Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11982944Abstract: A method of lithography process is provided. The method includes forming a conductive layer over a reticle. The method includes applying ionized particles to the reticle by a discharging device. The method includes forming a photoresist layer over a semiconductor substrate. The method includes securing the semiconductor substrate by a wafer electrostatic-clamp. The method also includes patterning the photoresist layer by emitting radiation from a radiation source via the reticle.Type: GrantFiled: May 31, 2023Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsiao-Lun Chang, Chueh-Chi Kuo, Tsung-Yen Lee, Tzung-Chi Fu, Li-Jui Chen, Po-Chung Cheng, Che-Chang Hsu
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Publication number: 20240136226Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Inventors: Li-Wei CHU, Ying-Chi SU, Yu-Kai CHEN, Wei-Yip LOH, Hung-Hsu CHEN, Chih-Wei CHANG, Ming-Hsing TSAI
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Patent number: 11955515Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.Type: GrantFiled: July 28, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
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Patent number: 11948879Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a device, a first dielectric material disposed over the device, and an opening is formed in the first dielectric material. The semiconductor device structure further includes a conductive structure disposed in the opening, and the conductive structure includes a first sidewall. The semiconductor device structure further includes a surrounding structure disposed in the opening, and the surrounding structure surrounds the first sidewall of the conductive structure. The surrounding structure includes a first spacer layer and a second spacer layer adjacent the first spacer layer. The first spacer layer is separated from the second spacer layer by an air gap.Type: GrantFiled: July 27, 2022Date of Patent: April 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Lin-Yu Huang, Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
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Publication number: 20240096996Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
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Publication number: 20240088216Abstract: The present invention provides a high voltage semiconductor device comprising a combined junction terminal protection structure, the device comprises: an active area formed with the high voltage semiconductor device; a combined junction terminal protection structure having a RESURF (Reduced Surface Field) structure, the RESURF structure comprising a first biasing field plate electrically connecting to the active area and a ferroelectric material layer positioned below the first biasing field plate and in contact with the first biasing field plate. The high voltage semiconductor device structure may further assist in raising breakdown voltage (BV) of the device and meanwhile effectively reduce on-resistance (Ron) of the device compared with current junction terminal protection structure, and then miniaturization of the device structure may be fulfilled more easily.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Applicant: SiEn (QingDao) Integrated Circuits Co., Ltd.Inventors: Min-Hwa CHI, Min LI, Richard Ru-Gin CHANG
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Publication number: 20240074119Abstract: An immersion cooling system includes a pressure seal tank, an electronic apparatus, a pressure balance pipe and a relief valve. The pressure seal tank is configured to store coolant. A vapor space is formed in the pressure seal tank above the liquid level of the coolant. The electronic apparatus is completely immersed in the coolant. The pressure balance pipe has a gas collection length. The first port of the pressure balance pipe is disposed on the top surface of the pressure seal tank. The relief valve is disposed on the second port of the pressure balance pipe. The second port is farther away from the top surface of the pressure seal tank than the first port. The gas collection length of the pressure equalization tube allows the concentration of vaporized coolant at the first port to be greater than the concentration of vaporized coolant at the second port.Type: ApplicationFiled: May 9, 2023Publication date: February 29, 2024Inventors: Ren-Chun CHANG, Wei-Chih LIN, Sheng-Chi WU, Wen-Yin TSAI, Li-Hsiu CHEN
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Patent number: 11915976Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.Type: GrantFiled: June 27, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wei Chu, Ying-Chi Su, Yu-Kai Chen, Wei-Yip Loh, Hung-Hsu Chen, Chih-Wei Chang, Ming-Hsing Tsai
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Patent number: 11916133Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a gate structure sandwiched between and in contact with a first spacer feature and a second spacer feature, a top surface of the first spacer feature and a top surface of the second spacer feature extending above a top surface of the gate structure, a gate self-aligned contact (SAC) dielectric feature over the first spacer feature and the second spacer feature, a contact etch stop layer (CESL) over the gate SAC dielectric feature, a dielectric layer over the CESL, a gate contact feature extending through the dielectric layer, the CESL, the gate SAC dielectric feature, and between the first spacer feature and the second spacer feature to be in contact with the gate structure, and a liner disposed between the first spacer feature and the gate contact feature.Type: GrantFiled: February 21, 2022Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Li-Zhen Yu, Lin-Yu Huang, Chia-Hao Chang, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
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Patent number: 10662413Abstract: A composition comprising a recombinant DNA polymerase and 3?-esterified nucleotide analogues is provided. The recombinant DNA polymerase includes an amino acid sequence that is at least 90% homology with 9° N DNA polymerase (SEQ ID NO: 1), and the recombinant DNA polymerase includes at least two mutations at the positions corresponding to amino acid residues 141 and 143 of the 9° N DNA polymerase. A recombinant DNA polymerase is further provided. The recombinant DNA polymerase includes an amino acid sequence that is at least 90% homology with 9° N-III DNA polymerase (SEQ ID NO: 3), and the recombinant DNA polymerase includes one or two mutations at the positions corresponding to amino acid residue 480 and 486 of the 9° N-III DNA polymerase. A method of performing a polymerization reaction is also provided.Type: GrantFiled: October 31, 2017Date of Patent: May 26, 2020Assignee: PERSONAL GENOMICS, INC.Inventors: Shiuan-Woei Lin Wu, Ching-Wei Tsai, Ting-Yueh Tsai, Jyun-Yuan Huang, Chao-Chi Pan, Li-Chi Chang, Ching-Long Hwong
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Patent number: 10068040Abstract: Methods and apparatus for recording and visualizing transactions of a test bench simulation are disclosed. Transaction-specific data generated from a test bench simulation may be displayed in a sequence diagram view to provide a view of the transactions arranged sequentially in time.Type: GrantFiled: July 2, 2015Date of Patent: September 4, 2018Assignee: SYNOPSYS, INC.Inventors: Yung Chuan Chen, I-Liang Lin, Li-Chi Chang, Bindesh Patel
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Publication number: 20180119115Abstract: A composition comprising a recombinant DNA polymerase and 3?-esterified nucleotide analogues is provided. The recombinant DNA polymerase includes an amino acid sequence that is at least 90% homology with 9° N DNA polymerase (SEQ ID NO: 1), and the recombinant DNA polymerase includes at least two mutations at the positions corresponding to amino acid residues 141 and 143 of the 9° N DNA polymerase. A recombinant DNA polymerase is further provided. The recombinant DNA polymerase includes an amino acid sequence that is at least 90% homology with 9° N-III DNA polymerase (SEQ ID NO: 3), and the recombinant DNA polymerase includes one or two mutations at the positions corresponding to amino acid residue 480 and 486 of the 9° N-III DNA polymerase. A method of performing a polymerization reaction is also provided.Type: ApplicationFiled: October 31, 2017Publication date: May 3, 2018Inventors: Shiuan-Woei LIN WU, Ching-Wei TSAI, Ting-Yueh TSAI, Jyun-Yuan HUANG, Chao-Chi PAN, Li-Chi CHANG, Ching-Long HWONG
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Publication number: 20170179767Abstract: A coil assembly and a wireless power transmission system are provided. The coil assembly includes a first coil and a second coil. The first coil is disposed on a first plane. The second coil is disposed on a second plane. The second coil is coupled to the first coil. The second coil includes a plurality of bending section, and the bending sections are connected by a plurality of connection lines to form a single loop.Type: ApplicationFiled: October 6, 2016Publication date: June 22, 2017Applicant: Industrial Technology Research InstituteInventors: Li-Chi Chang, Meng-Sheng Chen, Hsun Yu
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Publication number: 20160110484Abstract: Methods and apparatus for recording and visualizing transactions of a test bench simulation are disclosed. Transaction-specific data generated from a test bench simulation may be displayed in a sequence diagram view to provide a view of the transactions arranged sequentially in time.Type: ApplicationFiled: July 2, 2015Publication date: April 21, 2016Inventors: Yung Chuan CHEN, I-Liang LIN, Li-Chi CHANG, Bindesh PATEL
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Patent number: 9081924Abstract: Methods and apparatus for recording and visualizing transactions of a test bench simulation are disclosed. Transaction-specific data generated from a test bench simulation may be displayed in a sequence diagram view to provide a view of the transactions arranged sequentially in time.Type: GrantFiled: March 14, 2011Date of Patent: July 14, 2015Assignees: Synopsys, Inc., Synopsys Taiwan Co., Ltd.Inventors: Yung Chuan Chen, I-Liang Lin, Li-Chi Chang, Bindesh Patel
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Patent number: 8783579Abstract: An RFID sealing device for a bottle is disclosed, which provides information of production resumes, stock control, sale control and so like, where the information may be adapted for a computerized foods management system for the upstream manufacturer and the downstream sellers. Since the metal cap plays a part in the RFID sealing device, the RFID shall malfunction once the bottle cap has been turned or opened before sale, so that the present RFID sealing device plays a function of safety identifier to the bottled liquid or food in addition.Type: GrantFiled: July 4, 2012Date of Patent: July 22, 2014Assignee: Industrial Technology Research InstituteInventors: Li-Chi Chang, Yung-Chung Chang, Chang-Chih Liu, Cheng-Hua Tsai, Meng-Sheng Chen
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Patent number: 8686821Abstract: An inductor structure including a plurality of solenoids and at least one connecting line is provided. One of the solenoids serves as a core, and the remaining solenoids are sequentially wound around the core solenoid. Axes of the solenoids are substantially directed to the same direction. Each connecting line is correspondingly connected between ends of two adjacent solenoids to serially connect the solenoids.Type: GrantFiled: June 19, 2012Date of Patent: April 1, 2014Assignee: Industrial Technology Research InstituteInventors: Yung-Chung Chang, Meng-Sheng Chen, Chang-Chih Liu, Li-Chi Chang, Cheng-Hua Tsai
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Publication number: 20140008443Abstract: An RFID sealing device for a bottle is disclosed, which provides information of production resumes, stock control, sale control and so like, where the information may be adapted for a computerized foods management system for the upstream manufacturer and the downstream sellers. Since the metal cap plays a part in the RFID sealing device, the RFID shall malfunction once the bottle cap has been turned or opened before sale, so that the present RFID sealing device plays a function of safety identifier to the bottled liquid or food in addition.Type: ApplicationFiled: July 4, 2012Publication date: January 9, 2014Applicant: Industrial Technology Research InstituteInventors: Li-Chi Chang, Yung-Chung Chang, Chang-Chih Liu, Cheng-Hua Tsai, Meng-Sheng Chen
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Patent number: 8610626Abstract: An antenna having a signal feeding structure, an antenna conductor coupled to the signal feeding structure and forming a slot in the antenna conductor. A closing portion capacitively closing the at least one slot at a mechanically open end of the slot.Type: GrantFiled: December 9, 2010Date of Patent: December 17, 2013Assignee: Industrial Technology Research InstituteInventors: Li-Chi Chang, Yung-Chung Chang, Meng-Sheng Chen, Chang-Chih Liu, Chang-Sheng Chen
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Patent number: 8573495Abstract: A radio frequency identification electronic device with enhancing surface wave-guide effect includes a host or a programmable single IC, an identification transmitting/receiving device electrically connected to the host or the programmable single IC for generating a current, and an enhancing surface wave-guide coaxial cable structure. The enhancing surface wave-guide coaxial cable structure comprises a coaxial cable having at least one breach region without an outer conducting layer and a matching resistor, wherein the current builds up an electromagnetic (EM) wave while flowing through the at least one breach region, and the EM wave is transmitted along the outer conducting layer of the coaxial cable until to the matching resistor. Moreover, an electromagnetic field can be built up while the current flows through the at least one breach region, and a RFID electronic tag attached to an object can be automatically triggered by the electromagnetic field.Type: GrantFiled: July 30, 2012Date of Patent: November 5, 2013Inventors: Tai-Hwa Liu, Yi-Chun Sung, Cheng-Lun Yin, Li-Chi Chang