Abstract: Provided are structures and methods for forming structures with sloping surfaces of a desired profile. An exemplary method includes performing a first etch process to differentially etch a gate material to a recessed surface, wherein the recessed surface includes a first horn at a first edge, a second horn at a second edge, and a valley located between the first horn and the second horn; depositing an etch-retarding layer over the recessed surface, wherein the etch-retarding layer has a central region over the valley and has edge regions over the horns, and wherein the central region of the etch-retarding layer is thicker than the edge regions of the etch-retarding layer; and performing a second etch process to recess the horns to establish the gate material with a desired profile.

Abstract: Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion of the gate stack and the first metal cap layer while leaving a sidewall portion of the first metal cap layer that extends along a sidewall of the first dielectric cap layer; forming a second metal cap layer over the gate stack and the first metal cap layer wherein a sidewall portion of the second metal cap layer extends further along a sidewall of the first dielectric cap layer; forming a second dielectric cap layer over the second metal cap layer; and flattening a top layer of the first dielectric cap layer and the second dielectric cap layer using planarization operations.

Abstract: A method of fabricating a contact window. On semiconductor substrate having a conductive region, a dielectric layer is formed to cover the substrate and the conductive region. A gettering layer is formed on the dielectric layer. A hard mask layer is formed on the gettering layer. The hard mask layer is patterned to expose a part of the gettering layer which is right on top of the conductive region. The exposed gettering layer and the dielectric layer under the exposed gettering layer are removed to form the contact window.

Abstract: A method of fabricating a contact window. On semiconductor substrate having a conductive region, a dielectric layer is formed to cover the substrate and the conductive region. A gettering layer is formed on the dielectric layer. A hard mask layer is formed on the gettering layer. The hard mask layer is patterned to expose a part of the gettering layer which is right on top of the conductive region. The exposed gettering layer and the dielectric layer under the exposed gettering layer are removed to form the contact window.

Abstract: A method of dual damascene includes forming a first conducting layer on a substrate, which already contains formed devices, and then forming a first dielectric layer and a hard material layer on the first conducting layer. The hard material layer contains a first opening, which is located right over the first conducting layer. A second dielectric layer is formed on the hard material layer, wherein the second dielectric layer is enforced by a ion implantation process or a plasma process. A hard mask layer containing a second opening is then formed on the second dielectric layer, wherein the second opening gradually widens upward, and wherein the second opening is located over the first opening. The hard mask layer is then used to pattern the second dielectric layer to expose the hard material layer. A part of the first dielectric layer is removed to expose the first conducting layer and form a third opening after a protection layer is formed on the side wall of the second dielectric layer.

Abstract: An multi-level interconnection uses a glue layer material as a via plug or contact plug. An method of forming the multi-level interconnection includes: forming a first opening and a wider second opening in a dielectric layer, whereas the first opening exposes the conductive layer and the second opening is above the first opening; and filling the first opening with titanium, titanium nitride or tungsten nitride.

Abstract: A polishing stop structure has a polishing stop layer formed in the dielectric layer. When a chemical mechanical polishing is performed on a bumpy surface of this structure, the lower regions of the surface are first to expose the polishing stop layer, is not easily removed. While polishing stops at the lower regions, the higher regions continue to be polished. The structure can control the polishing level to increase the window of over-etching and attain a smoother surface.