Patents by Inventor Li-Chieh Chen

Li-Chieh Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210294220
    Abstract: A method includes irradiating a target droplet in an extreme ultraviolet light source of an extreme ultraviolet lithography tool with light from a droplet illumination module. Light reflected and/or scattered by the target droplet is detected. Particle image velocimetry is performed to monitor one or more flow parameters inside the extreme ultraviolet light source.
    Type: Application
    Filed: June 7, 2021
    Publication date: September 23, 2021
    Inventors: En Hao LAI, Chi YANG, Shang-Chieh CHIEN, Li-Jui CHEN, Po-Chung CHENG
  • Publication number: 20210274627
    Abstract: A target droplet source for an extreme ultraviolet (EUV) source includes a droplet generator configured to generate target droplets of a given material. The droplet generator includes a nozzle configured to supply the target droplets in a space enclosed by a chamber. The target droplet source further includes a sleeve disposed in the chamber distal to the nozzle. The sleeve is configured to provide a path for the target droplets in the chamber.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Inventors: Wei-Chih LAI, Han-Lung CHANG, Chi YANG, Shang-Chieh CHIEN, Bo-Tsun LIU, Li-Jui CHEN, Po-Chung CHENG
  • Patent number: 10943531
    Abstract: The present invention provides a decay factor accumulation method for an organic light-emitting diode (OLED) display panel with a variable refresh rate (VRR). The decay factor accumulation method includes detecting an operating frame rate of an input image; generating a decay factor compensation coefficient according to the operating frame rate and a measurement frame rate; and generating a plurality of accumulated decay factors of the input image according to a decay factor lookup table corresponding to the measurement frame rate and the decay factor compensation coefficient.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: March 9, 2021
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Li-Chieh Chen, Yen-Tao Liao
  • Patent number: 10277121
    Abstract: A charge pump circuit includes a first switch˜a fourth switch, a capacitor, a current source, a first resistor, a second resistor, an amplifier, another current source, a current mirror, a skip detection circuit, a switch generation circuit and a control unit. A method includes: (a) starting the charge pump circuit; (b) operating the charge pump circuit in a first phase, wherein the first switch and second switch are conducted and the third switch and fourth switch are disconnected; (c) operating the charge pump circuit in a second phase, wherein the third switch and fourth switch are conducted and the first switch and second switch are disconnected; (d) determining whether a detected voltage in the skip detection circuit is higher than a threshold voltage; and (e) selectively performing step (b) or (c) again according to determination result of step (d).
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: April 30, 2019
    Assignee: Raydium Semiconductor Corporation
    Inventors: Pei-Kai Tseng, Li-Chieh Chen, Chih-Jen Hung
  • Publication number: 20190044437
    Abstract: A charge pump circuit includes a first switch˜a fourth switch, a capacitor, a current source, a first resistor, a second resistor, an amplifier, another current source, a current mirror, a skip detection circuit, a switch generation circuit and a control unit. A method includes: (a) starting the charge pump circuit; (b) operating the charge pump circuit in a first phase, wherein the first switch and second switch are conducted and the third switch and fourth switch are disconnected; (c) operating the charge pump circuit in a second phase, wherein the third switch and fourth switch are conducted and the first switch and second switch are disconnected; (d) determining whether a detected voltage in the skip detection circuit is higher than a threshold voltage; and (e) selectively performing step (b) or (c) again according to determination result of step (d).
    Type: Application
    Filed: August 1, 2018
    Publication date: February 7, 2019
    Inventors: Pei-Kai TSENG, Li-Chieh CHEN, Chih-Jen HUNG
  • Patent number: 10140916
    Abstract: A charge pump and operating method thereof are disclosed. The charge pump includes a first capacitor to a third capacitor and a first switch to a tenth switch. The charge pump is used to receive an input voltage and provide an output voltage to a load capacitor. When the charge pump is operated in a first mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (?½) times the input voltage. When the charge pump is operated in a second mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (??) times the input voltage.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: November 27, 2018
    Assignee: DAZZO TECHNOLOGY CORPORATION
    Inventors: Li-Chieh Chen, Hsuan-Hao Chien, Chih-Jen Hung
  • Publication number: 20180226017
    Abstract: A charge pump and operating method thereof are disclosed. The charge pump includes a first capacitor to a third capacitor and a first switch to a tenth switch. The charge pump is used to receive an input voltage and provide an output voltage to a load capacitor. When the charge pump is operated in a first mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (?½) times the input voltage. When the charge pump is operated in a second mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (??) times the input voltage.
    Type: Application
    Filed: February 1, 2018
    Publication date: August 9, 2018
    Inventors: Li-Chieh Chen, Hsuan-Hao Chien, Chih-Jen Hung
  • Patent number: 9134738
    Abstract: A voltage converter is disclosed. The voltage converter includes a constant on time signal generator, a first and second transistors, an inductor, a feedback circuit and a ripple injection circuit. The constant on time signal generator generates a first and second driving signals for driving the first and second transistors. The voltage converter generates an output signal at an output end thereof. The feedback circuit divides the output signal to generate a feedback signal at a feedback end of the voltage converter. The ripple injection circuit gets the voltage of the feedback end and the voltage of the phase end to generate a injection signal. The constant on time signal generator generates the first and second driving signals according to the injection signal, the output signal and a reference signal.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: September 15, 2015
    Assignee: Excelliance MOS Corporation
    Inventors: Pao-Chuan Lin, Li-Chieh Chen, Hung-Che Chou
  • Patent number: 9058043
    Abstract: A voltage converter includes a constant on time signal generator, a first transistor, a second transistor, an inductor, and a ripple injection circuit. The constant on time signal generator generates a first driving signal and a second driving signal. The ripple injection circuit receives an output signal and generates a ripple injection signal. The constant on time signal generator generates the first and second driving signals according to the ripple injection signal, the output signal, and a reference signal.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: June 16, 2015
    Assignee: Excelliance MOS Corporation
    Inventors: Pao-Chuan Lin, Li-Chieh Chen, Hung-Che Chou
  • Publication number: 20140253060
    Abstract: A voltage converter includes a constant on time signal generator, a first transistor, a second transistor, an inductor, and a ripple injection circuit. The constant on time signal generator generates a first driving signal and a second driving signal. The ripple injection circuit receives an output signal and generates a ripple injection signal. The constant on time signal generator generates the first and second driving signals according to the ripple injection signal, the output signal, and a reference signal.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 11, 2014
    Applicant: Excelliance MOS Corporation
    Inventors: Pao-Chuan Lin, Li-Chieh Chen, Hung-Che Chou
  • Publication number: 20140225578
    Abstract: A voltage converter is disclosed. The voltage converter includes a constant on time signal generator, a first and second transistors, an inductor, a feedback circuit and a ripple injection circuit. The constant on time signal generator generates a first and second driving signals for driving the first and second transistors. The voltage converter generates an output signal at an output end thereof. The feedback circuit divides the output signal to generate a feedback signal at a feedback end of the voltage converter. The ripple injection circuit gets the voltage of the feedback end and the voltage of the phase end to generate a injection signal. The constant on time signal generator generates the first and second driving signals according to the injection signal, the output signal and a reference signal.
    Type: Application
    Filed: February 8, 2013
    Publication date: August 14, 2014
    Applicant: EXCELLIANCE MOS CORPORATION
    Inventors: Pao-Chuan Lin, Li-Chieh Chen, Hung-Che Chou
  • Publication number: 20140220731
    Abstract: The present invention provides a binder-free process for preparing a photoanode of flexible dye-sensitized solar cell, comprising: (a) preparing a TiO2 suspension fluid comprising TiO2, acetylacetone and anhydrous ethanol; (b) preparing a charge solution comprising iodine, ketone and deionized water; (c) mixing said TiO2 suspension fluid and said charge solution to obtain an electrophoresis suspension; (d) soaking a substrate and a cathode into the electrophoresis suspension and proceeding electrophoresis to obtain an TiO2 deposited substrate, in which said substrate and said cathode are flexible; (e) heating the TiO2 deposited substrate; and (f) compressing the heated TiO2 substrate to obtain the photoanode.
    Type: Application
    Filed: February 6, 2013
    Publication date: August 7, 2014
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: JYH-MING TING, LI-CHIEH CHEN, Yuh-Lang Lee, Min-Hsiung Hon
  • Publication number: 20140216536
    Abstract: The present invention provides a flexible dye-sensitized solar cell, comprising: an anode, which is a photoelectrode comprising a substrate covered with an electrophoretically deposited TiO2 film; a cathode; and a gel-electrolyte. Particularly, the present invention provides a solar cell comprising a photoanode prepared by the following steps: (a) preparing a TiO2 suspension fluid comprising TiO2, acetylacetone and anhydrous ethanol; (b) preparing a charge solution comprising iodine, ketone and deionized water; (c) mixing said TiO2 suspension fluid and said charge solution to obtain an electrophoresis suspension; (d) soaking a substrate and a cathode into the electrophoresis suspension and proceeding electrophoresis to obtain an TiO2 deposited substrate, in which said substrate and said cathode are flexible; (e) heating the TiO2 deposited substrate; and (f) compressing the heated TiO2 substrate to obtain the photoanode.
    Type: Application
    Filed: February 6, 2013
    Publication date: August 7, 2014
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: JYH-MING TING, LI-CHIEH CHEN
  • Publication number: 20120080048
    Abstract: The present invention is related to a jaw clip. The jaw clip comprises a first jaw unit, a second jaw unit and a pivot. The first jaw unit contains a first base part, pluralities of first expanding parts and pluralities of first jointing parts thereof. Each of first expanding part has pluralities of pillars disposed in line coincident with axial direction of the first expanding part. Each of first jointing part has pluralities of holes disposed in line coincident with axial direction of the first jointing part. Each of pillar disposes in a hole, so that first expanding part may rotate relative to first jointing part. The second jaw unit contains a second base part, pluralities of second expanding parts and pluralities of second jointing parts thereof. The pivot pivotally connects the first base part and the second base part, so that the first jaw unit may rotate relative to the second jaw unit.
    Type: Application
    Filed: October 1, 2010
    Publication date: April 5, 2012
    Inventor: Li-Chieh Chen
  • Patent number: 8026705
    Abstract: A bootstrap circuit is utilized in a bulk circuit using an NMOS transistor as a power switch. The bootstrap circuit includes a first PMOS transistor coupled between an internal power source and an offset capacitor, and a second PMOS transistor coupled between the gate of the first PMOS transistor and the offset capacitor, and an NMOS transistor coupled between the gate of the first PMOS transistor and ground. When the power switch is turned on, the second PMOS transistor is turned on for turning off the first PMOS transistor. When the power switch is turned off, the NMOS transistor is turned on for turning on the first PMOS transistor.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: September 27, 2011
    Assignee: Advanced Analog Technology, Inc.
    Inventors: Li-Chieh Chen, Yu-Min Sun, Yu-Lee Yeh
  • Publication number: 20100219759
    Abstract: A short-circuit detection method provides a dimmer signal for driving a light source and a feedback signal which varies according to the voltage drop across the light source. When the voltage level of the feedback signal is below a reference voltage, a high-level compare signal is provided. When the voltage level of the feedback signal is above the reference voltage, a low-level compare signal is provided. When the dimmer signal is at high level and the compare signal is at low level, a high-level count signal is provided. When the count signal has switched to high level more than a predetermined number of times, a short-circuit signal is outputted.
    Type: Application
    Filed: January 27, 2010
    Publication date: September 2, 2010
    Inventor: Li-Chieh Chen
  • Publication number: 20100117610
    Abstract: A bootstrap circuit is utilized in a bulk circuit using an NMOS transistor as a power switch. The bootstrap circuit includes a first PMOS transistor coupled between an internal power source and an offset capacitor, and a second PMOS transistor coupled between the gate of the first PMOS transistor and the offset capacitor, and an NMOS transistor coupled between the gate of the first PMOS transistor and ground. When the power switch is turned on, the second PMOS transistor is turned on for turning off the first PMOS transistor. When the power switch is turned off, the NMOS transistor is turned on for turning on the first PMOS transistor.
    Type: Application
    Filed: January 16, 2009
    Publication date: May 13, 2010
    Inventors: Li-Chieh Chen, Yu-Min Sun, Yu-Lee Yeh
  • Publication number: 20100102795
    Abstract: A voltage reference circuit includes an operational amplifier, an output P-type MOS transistor, a first resistor, a first BJT, a second BJT, a third resistor, and a plurality of output resistors connected in series. A gate of the output P-type MOS transistor is electrically connected to an output end of the operational amplifier, and a drain of the output P-type MOS transistor is electrically connected to a voltage source. The gate of the output P-type MOS transistor is controlled by the output end of the operational amplifier, so that the drain current of the output P-type MOS transistor can match the current of the first resistor, the third resistor, and the plurality of output resistors connected in series.
    Type: Application
    Filed: January 8, 2009
    Publication date: April 29, 2010
    Inventors: Yu-Min Sun, Li-Chieh Chen
  • Patent number: 7471117
    Abstract: The circuit for detecting the maximal frequency of the pulse frequency modulation includes an oscillator-controlling unit, a delay circuit and a master-slave register. The oscillator-controlling unit is connected to an oscillator, which generates the pulse frequency modulation signals, and includes a first-half pulse-generating module and a second-half pulse-generating module. The delay circuit is connected to the second-half pulse-generating module. The master-slave register includes a clock, an input end and an output end, wherein the input end is connected to the oscillator-controlling unit, and the clock is connected to the delay circuit.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: December 30, 2008
    Assignee: Advanced Analog Technology, Inc.
    Inventors: Li Chieh Chen, Yu Min Sun, Chu Yu Chu
  • Patent number: 7446621
    Abstract: The switching method between pulse frequency modulation and pulse width modulation signals is first based on an output voltage of a power transistor to generate a corresponding pulse frequency modulation signal. Next, it is determined whether the corresponding pulse frequency modulation signal has reached its maximal frequency. If so, the initial pulse width modulation signal is adjusted to have the same width as the pulse frequency modulation signal. Thereafter, the adjusted pulse width modulation signal is outputted.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: November 4, 2008
    Assignee: Advanced Analog Technology, Inc.
    Inventors: Li Chieh Chen, Yu Min Sun, Chu Yu Chu