Abstract: Techniques pertaining to anti-motion and anti-interference frame exchange sequences in wireless communications are described. A station (STA), such as a Wi-Fi equipment, determines to enable a frame exchange sequence (FES). The STA then communicates with one or more other STAs by utilizing the FES in which preamble puncturing sounding and data transmission are performed in a same transmission opportunity (TXOP).

Abstract: The disclosure provides a processor and a pixel degradation compensation method thereof. The processor includes a processing circuit and a pixel degradation compensation circuit. The pixel degradation compensation circuit is coupled to the processing circuit to receive image frame data. The pixel degradation compensation circuit adjusts the grayscales of all sub-pixel data of the image frame data based on a grayscale adjustment rate corresponding to the image frame data to generate adjusted image frame data. The pixel degradation compensation circuit generates a total degradation value corresponding to current sub-pixel data in the adjusted image frame data based on the current sub-pixel data. The pixel degradation compensation circuit compensates the current sub-pixel data based on the total degradation value corresponding to the current sub-pixel data to generate compensated current sub-pixel data in compensated image frame data to a display module.

Abstract: The application discloses a device and method for beamforming. The beamforming method comprises: sending a null data packet announcement (NDPA) frame from a beamformer to a pseudo user and a target user to indicate the target user to prepare for channel estimation; sending a null data packet (NDP) from the beamformer to the target user and performing channel estimation by the target user based on the NDP to determine channel state information; sending a beamforming report poll (BRP) trigger frame from the beamformer to the target user to trigger the target user to feed back channel state information; and sending from the target user a beamforming report to the beamformer, wherein the beamforming report including the channel state information.

Abstract: The disclosure provides a processor and a pixel degradation compensation method thereof. The processor includes a processing circuit and a pixel degradation compensation circuit. The pixel degradation compensation circuit generates a current degradation value based on current sub-pixel data. The current degradation value represents the degradation effect of the current sub-pixel data on a corresponding sub-pixel in a display module. The pixel degradation compensation circuit may adjust the current degradation value to generate an adjusted degradation value corresponding to the current sub-pixel data. The adjusted degradation value is accumulated to a total degradation value corresponding to the current sub-pixel data. The pixel degradation compensation circuit compensates the current sub-pixel data based on the total degradation value corresponding to the current sub-pixel data so as to generate compensated current sub-pixel data to the display module.

Abstract: Techniques pertaining to anti-motion and anti-interference frame exchange sequences in wireless communications are described. A station (STA), such as a Wi-Fi equipment, determines to enable a frame exchange sequence (FES). The STA then communicates with one or more other STAs by utilizing the FES in which preamble puncturing sounding and data transmission are performed in a same transmission opportunity (TXOP).

Abstract: A timing controller and a polarity control method thereof are provided. The timing controller includes a line buffer and a check circuit. The line buffer temporarily stores a plurality of sub-pixel data of a current sub-pixel row in an image frame so as to transmit the plurality of sub-pixel data of the current sub-pixel row to a source driver. The check circuit generates a polarity command corresponding to the current sub-pixel row for the source driver to set a polarity inversion mode of the current sub-pixel row. The check circuit checks the plurality of sub-pixel data of the current sub-pixel row so as to determine whether to dynamically change the polarity inversion mode of the current sub-pixel row.

Abstract: The disclosure provides a method and an image processor for computing decay factors for display degradation compensation. The method includes the following steps. A sequence of frames including a current frame are received. Whether the current frame is a dynamic frame or a static frame is determined. When the current frame is the dynamic frame, accumulation on decay factors is performed. When the current frame is the static frame, accumulation on the decay factors is not performed.

Abstract: The disclosure provides a method and an image processor for computing decay factors for display degradation compensation. The method includes the following steps. A sequence of frames including a current frame are received. Whether the current frame is a dynamic frame or a static frame is determined. When the current frame is the dynamic frame, accumulation on decay factors is performed. When the current frame is the static frame, accumulation on the decay factors is not performed.

Abstract: The present invention provides a decay factor accumulation method for an organic light-emitting diode (OLED) display panel with a variable refresh rate (VRR). The decay factor accumulation method includes detecting an operating frame rate of an input image; generating a decay factor compensation coefficient according to the operating frame rate and a measurement frame rate; and generating a plurality of accumulated decay factors of the input image according to a decay factor lookup table corresponding to the measurement frame rate and the decay factor compensation coefficient.

Abstract: A charge pump circuit includes a first switch˜a fourth switch, a capacitor, a current source, a first resistor, a second resistor, an amplifier, another current source, a current mirror, a skip detection circuit, a switch generation circuit and a control unit. A method includes: (a) starting the charge pump circuit; (b) operating the charge pump circuit in a first phase, wherein the first switch and second switch are conducted and the third switch and fourth switch are disconnected; (c) operating the charge pump circuit in a second phase, wherein the third switch and fourth switch are conducted and the first switch and second switch are disconnected; (d) determining whether a detected voltage in the skip detection circuit is higher than a threshold voltage; and (e) selectively performing step (b) or (c) again according to determination result of step (d).

Abstract: A charge pump circuit includes a first switch˜a fourth switch, a capacitor, a current source, a first resistor, a second resistor, an amplifier, another current source, a current mirror, a skip detection circuit, a switch generation circuit and a control unit. A method includes: (a) starting the charge pump circuit; (b) operating the charge pump circuit in a first phase, wherein the first switch and second switch are conducted and the third switch and fourth switch are disconnected; (c) operating the charge pump circuit in a second phase, wherein the third switch and fourth switch are conducted and the first switch and second switch are disconnected; (d) determining whether a detected voltage in the skip detection circuit is higher than a threshold voltage; and (e) selectively performing step (b) or (c) again according to determination result of step (d).

Abstract: A charge pump and operating method thereof are disclosed. The charge pump includes a first capacitor to a third capacitor and a first switch to a tenth switch. The charge pump is used to receive an input voltage and provide an output voltage to a load capacitor. When the charge pump is operated in a first mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (?½) times the input voltage. When the charge pump is operated in a second mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (??) times the input voltage.

Abstract: A charge pump and operating method thereof are disclosed. The charge pump includes a first capacitor to a third capacitor and a first switch to a tenth switch. The charge pump is used to receive an input voltage and provide an output voltage to a load capacitor. When the charge pump is operated in a first mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (?½) times the input voltage. When the charge pump is operated in a second mode, the charge pump controls the second capacitor failure, the output voltage and the input voltage have opposite electricity and the output voltage is (??) times the input voltage.

Abstract: A voltage converter is disclosed. The voltage converter includes a constant on time signal generator, a first and second transistors, an inductor, a feedback circuit and a ripple injection circuit. The constant on time signal generator generates a first and second driving signals for driving the first and second transistors. The voltage converter generates an output signal at an output end thereof. The feedback circuit divides the output signal to generate a feedback signal at a feedback end of the voltage converter. The ripple injection circuit gets the voltage of the feedback end and the voltage of the phase end to generate a injection signal. The constant on time signal generator generates the first and second driving signals according to the injection signal, the output signal and a reference signal.

Abstract: A voltage converter includes a constant on time signal generator, a first transistor, a second transistor, an inductor, and a ripple injection circuit. The constant on time signal generator generates a first driving signal and a second driving signal. The ripple injection circuit receives an output signal and generates a ripple injection signal. The constant on time signal generator generates the first and second driving signals according to the ripple injection signal, the output signal, and a reference signal.

Abstract: A voltage converter includes a constant on time signal generator, a first transistor, a second transistor, an inductor, and a ripple injection circuit. The constant on time signal generator generates a first driving signal and a second driving signal. The ripple injection circuit receives an output signal and generates a ripple injection signal. The constant on time signal generator generates the first and second driving signals according to the ripple injection signal, the output signal, and a reference signal.

Abstract: A voltage converter is disclosed. The voltage converter includes a constant on time signal generator, a first and second transistors, an inductor, a feedback circuit and a ripple injection circuit. The constant on time signal generator generates a first and second driving signals for driving the first and second transistors. The voltage converter generates an output signal at an output end thereof. The feedback circuit divides the output signal to generate a feedback signal at a feedback end of the voltage converter. The ripple injection circuit gets the voltage of the feedback end and the voltage of the phase end to generate a injection signal. The constant on time signal generator generates the first and second driving signals according to the injection signal, the output signal and a reference signal.

Abstract: The present invention provides a flexible dye-sensitized solar cell, comprising: an anode, which is a photoelectrode comprising a substrate covered with an electrophoretically deposited TiO2 film; a cathode; and a gel-electrolyte. Particularly, the present invention provides a solar cell comprising a photoanode prepared by the following steps: (a) preparing a TiO2 suspension fluid comprising TiO2, acetylacetone and anhydrous ethanol; (b) preparing a charge solution comprising iodine, ketone and deionized water; (c) mixing said TiO2 suspension fluid and said charge solution to obtain an electrophoresis suspension; (d) soaking a substrate and a cathode into the electrophoresis suspension and proceeding electrophoresis to obtain an TiO2 deposited substrate, in which said substrate and said cathode are flexible; (e) heating the TiO2 deposited substrate; and (f) compressing the heated TiO2 substrate to obtain the photoanode.

Abstract: The present invention provides a binder-free process for preparing a photoanode of flexible dye-sensitized solar cell, comprising: (a) preparing a TiO2 suspension fluid comprising TiO2, acetylacetone and anhydrous ethanol; (b) preparing a charge solution comprising iodine, ketone and deionized water; (c) mixing said TiO2 suspension fluid and said charge solution to obtain an electrophoresis suspension; (d) soaking a substrate and a cathode into the electrophoresis suspension and proceeding electrophoresis to obtain an TiO2 deposited substrate, in which said substrate and said cathode are flexible; (e) heating the TiO2 deposited substrate; and (f) compressing the heated TiO2 substrate to obtain the photoanode.

Abstract: The present invention is related to a jaw clip. The jaw clip comprises a first jaw unit, a second jaw unit and a pivot. The first jaw unit contains a first base part, pluralities of first expanding parts and pluralities of first jointing parts thereof. Each of first expanding part has pluralities of pillars disposed in line coincident with axial direction of the first expanding part. Each of first jointing part has pluralities of holes disposed in line coincident with axial direction of the first jointing part. Each of pillar disposes in a hole, so that first expanding part may rotate relative to first jointing part. The second jaw unit contains a second base part, pluralities of second expanding parts and pluralities of second jointing parts thereof. The pivot pivotally connects the first base part and the second base part, so that the first jaw unit may rotate relative to the second jaw unit.