Patents by Inventor Li-Chieh Chen
Li-Chieh Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250076770Abstract: In a method of generating extreme ultraviolet (EUV) radiation in a semiconductor manufacturing system one or more streams of a gas is directed, through one or more gas outlets mounted over a rim of a collector mirror of an EUV radiation source, to generate a flow of the gas over a surface of the collector mirror. The one or more flow rates of the one or more streams of the gas are adjusted to reduce an amount of metal debris deposited on the surface of the collector mirror.Type: ApplicationFiled: November 14, 2024Publication date: March 6, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Che-Chang HSU, Sheng-Kang YU, Shang-Chieh CHIEN, Li-Jui CHEN, Heng-Hsin LIU
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Patent number: 12235593Abstract: A system and method for dynamically controlling a temperature of a thermostatic reticle. A thermostatic reticle assembly that includes a reticle, temperature sensors located in proximity to the reticle, and one or more heating elements. A thermostat component that is in communication with the temperature sensors and the heating element monitors the current temperature of the reticle relative to a steady-state temperature. In response to the current temperature of the reticle being lower than the steady-state temperature, the heating elements are activated to preheat the reticle to the steady-state temperature.Type: GrantFiled: May 15, 2023Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tzu-Jung Pan, Sheng-Kang Yu, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
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Patent number: 12235594Abstract: A method for performing a lithography process is provided. The method includes forming a photoresist layer over a substrate, providing a plurality of target droplets to a source vessel, and providing a plurality of first laser pulses according to a control signal provided by a controller to irradiate the target droplets in the source vessel to generate plasma as an EUV radiation. The plasma is generated when the control signal indicates a temperature of the source vessel is within a temperature threshold value. The method further includes directing the EUV radiation from the source vessel to the photoresist layer to form a patterned photoresist layer and developing and etching the patterned photoresist layer to form a circuit layout.Type: GrantFiled: May 31, 2023Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chi Yang, Ssu-Yu Chen, Shang-Chieh Chien, Chieh Hsieh, Tzung-Chi Fu, Bo-Tsun Liu, Li-Jui Chen, Po-Chung Cheng
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Patent number: 12235586Abstract: Impurities in a liquefied solid fuel utilized in a droplet generator of an extreme ultraviolet photolithography system are removed from vessels containing the liquefied solid fuel. Removal of the impurities increases the stability and predictability of droplet formation which positively impacts wafer yield and droplet generator lifetime.Type: GrantFiled: August 7, 2023Date of Patent: February 25, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Hao Lai, Ming-Hsun Tsai, Hsin-Feng Chen, Wei-Shin Cheng, Yu-Kuang Sun, Cheng-Hsuan Wu, Yu-Fa Lo, Shih-Yu Tu, Jou-Hsuan Lu, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
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Patent number: 12228863Abstract: A system for monitoring and controlling an EUV light source includes a first temperature sensor, a signal processor, and a process controller. The first temperature sensor includes a portion inserted into a space surrounded by a plurality of vanes through a vane of the plurality of vanes, and obtains an ambient temperature that decreases with time as a function of tin contamination coating on the inserted portion. The signal processor determines an excess tin debris deposition on the vane based on the obtained chamber ambient temperature. The process controller activates a vane cleaning action upon being informed of the excess tin debris deposition by the signal processor, thereby improving availability of the EUV light source tool and reducing risks of tin pollution on other tools such as a reticle.Type: GrantFiled: April 12, 2023Date of Patent: February 18, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng Hung Tsai, Sheng-Kang Yu, Heng-Hsin Liu, Li-Jui Chen, Shang-Chieh Chien
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Patent number: 12224001Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.Type: GrantFiled: November 30, 2022Date of Patent: February 11, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
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Patent number: 12210295Abstract: Some implementations described herein provide a reticle cleaning device and a method of use. The reticle cleaning device includes a support member configured for extension toward a reticle within an extreme ultraviolet lithography tool. The reticle cleaning device also includes a contact surface disposed at an end of the support member and configured to bond to particles contacted by the contact surface. The reticle cleaning device further includes a stress sensor configured to measure an amount of stress applied to the support member at the contact surface. During a cleaning operation in which the contact surface is moving toward the reticle, the stress sensor may provide an indication that the amount of stress applied to the support member satisfies a threshold. Based on satisfying the threshold, movement of the contact surface and/or the support member toward the reticle ceases to avoid damaging the reticle.Type: GrantFiled: April 28, 2023Date of Patent: January 28, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Che-Chang Hsu, Sheng-Kang Yu, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
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Patent number: 12207381Abstract: An extreme ultraviolet (EUV) light source and a method for patterning a resist layer on a substrate using the EUV light source are disclosed. For example, the EUV light source includes a droplet generator, a droplet catcher, a laser source, a plurality of vanes, and a bucket. The droplet generator is to generate tin droplets. The droplet catcher is opposite to the droplet generator to catch the tin droplets. The laser source is to generate a laser beam striking the tin droplets to form a plasma. The plurality of vanes are arranged around an axis to collect tin debris created from the plasma. The bucket is connected to the vanes and includes a cover, a vane bucket, and a heater. The cover has an opening. The vane bucket is surrounded by the cover. The heater is on a sidewall of the cover and spaced apart from the droplet catcher.Type: GrantFiled: April 4, 2022Date of Patent: January 21, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ssu-Yu Chen, Shang-Chieh Chien, Li-Jui Chen
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Publication number: 20250022848Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.Type: ApplicationFiled: October 1, 2024Publication date: January 16, 2025Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chang Chi LEE, Jung Jui KANG, Chiu-Wen LEE, Li Chieh CHEN
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Publication number: 20250023604Abstract: The application discloses a device and method for beamforming. The beamforming method comprises: sending a null data packet announcement (NDPA) frame from a beamformer to a pseudo user and a target user to indicate the target user to prepare for channel estimation; sending a null data packet (NDP) from the beamformer to the target user and performing channel estimation by the target user based on the NDP to determine channel state information; sending a beamforming report poll (BRP) trigger frame from the beamformer to the target user to trigger the target user to feed back channel state information; and sending from the target user a beamforming report to the beamformer, wherein the beamforming report including the channel state information.Type: ApplicationFiled: June 14, 2024Publication date: January 16, 2025Inventors: Li-Chieh CHEN, Cheng-En HSIEH, Wei-Hsu CHEN, Ming-Hsiang TSENG, Kang-Li WU
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Patent number: 12112711Abstract: The disclosure provides a processor and a pixel degradation compensation method thereof. The processor includes a processing circuit and a pixel degradation compensation circuit. The pixel degradation compensation circuit generates a current degradation value based on current sub-pixel data. The current degradation value represents the degradation effect of the current sub-pixel data on a corresponding sub-pixel in a display module. The pixel degradation compensation circuit may adjust the current degradation value to generate an adjusted degradation value corresponding to the current sub-pixel data. The adjusted degradation value is accumulated to a total degradation value corresponding to the current sub-pixel data. The pixel degradation compensation circuit compensates the current sub-pixel data based on the total degradation value corresponding to the current sub-pixel data so as to generate compensated current sub-pixel data to the display module.Type: GrantFiled: August 23, 2023Date of Patent: October 8, 2024Assignee: Novatek Microelectronics Corp.Inventors: Li-Chieh Chen, Yen-Tao Liao
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Patent number: 12107074Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.Type: GrantFiled: February 28, 2023Date of Patent: October 1, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chang Chi Lee, Jung Jui Kang, Chiu-Wen Lee, Li Chieh Chen
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Publication number: 20240188130Abstract: Techniques pertaining to anti-motion and anti-interference frame exchange sequences in wireless communications are described. A station (STA), such as a Wi-Fi equipment, determines to enable a frame exchange sequence (FES). The STA then communicates with one or more other STAs by utilizing the FES in which preamble puncturing sounding and data transmission are performed in a same transmission opportunity (TXOP).Type: ApplicationFiled: October 4, 2023Publication date: June 6, 2024Inventors: Li-Chieh Chen, Kuo-Wei Chen, Chia-Jung Hsu, Yi-Hsuan Chung, Ming-Hsiang Tseng, Wei-Hsu Chen, Cheng-En Hsieh
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Publication number: 20240161680Abstract: A timing controller and a polarity control method thereof are provided. The timing controller includes a line buffer and a check circuit. The line buffer temporarily stores a plurality of sub-pixel data of a current sub-pixel row in an image frame so as to transmit the plurality of sub-pixel data of the current sub-pixel row to a source driver. The check circuit generates a polarity command corresponding to the current sub-pixel row for the source driver to set a polarity inversion mode of the current sub-pixel row. The check circuit checks the plurality of sub-pixel data of the current sub-pixel row so as to determine whether to dynamically change the polarity inversion mode of the current sub-pixel row.Type: ApplicationFiled: November 10, 2022Publication date: May 16, 2024Applicant: Novatek Microelectronics Corp.Inventors: Li-Chieh Chen, Yen-Tao Liao
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Publication number: 20230207524Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.Type: ApplicationFiled: February 28, 2023Publication date: June 29, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chang Chi LEE, Jung Jui KANG, Chiu-Wen LEE, Li Chieh CHEN
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Patent number: 11594518Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.Type: GrantFiled: June 3, 2021Date of Patent: February 28, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chang Chi Lee, Jung Jui Kang, Chiu-Wen Lee, Li Chieh Chen
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Publication number: 20220392871Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.Type: ApplicationFiled: June 3, 2021Publication date: December 8, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chang Chi LEE, Jung Jui KANG, Chiu-Wen LEE, Li Chieh CHEN
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Patent number: 11461888Abstract: The disclosure provides a method and an image processor for computing decay factors for display degradation compensation. The method includes the following steps. A sequence of frames including a current frame are received. Whether the current frame is a dynamic frame or a static frame is determined. When the current frame is the dynamic frame, accumulation on decay factors is performed. When the current frame is the static frame, accumulation on the decay factors is not performed.Type: GrantFiled: July 20, 2020Date of Patent: October 4, 2022Assignee: Novatek Microelectronics Corp.Inventors: Li-Chieh Chen, Yen-Tao Liao
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Publication number: 20220020133Abstract: The disclosure provides a method and an image processor for computing decay factors for display degradation compensation. The method includes the following steps. A sequence of frames including a current frame are received. Whether the current frame is a dynamic frame or a static frame is determined. When the current frame is the dynamic frame, accumulation on decay factors is performed. When the current frame is the static frame, accumulation on the decay factors is not performed.Type: ApplicationFiled: July 20, 2020Publication date: January 20, 2022Applicant: Novatek Microelectronics Corp.Inventors: Li-Chieh Chen, Yen-Tao Liao
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Patent number: 10943531Abstract: The present invention provides a decay factor accumulation method for an organic light-emitting diode (OLED) display panel with a variable refresh rate (VRR). The decay factor accumulation method includes detecting an operating frame rate of an input image; generating a decay factor compensation coefficient according to the operating frame rate and a measurement frame rate; and generating a plurality of accumulated decay factors of the input image according to a decay factor lookup table corresponding to the measurement frame rate and the decay factor compensation coefficient.Type: GrantFiled: June 3, 2020Date of Patent: March 9, 2021Assignee: NOVATEK Microelectronics Corp.Inventors: Li-Chieh Chen, Yen-Tao Liao