Patents by Inventor Li-Chieh Chou

Li-Chieh Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10535593
    Abstract: A package structure including a circuit substrate, a semiconductor die, a redistribution layer, a plurality of conductive balls and a circuit substrate is provided. The redistribution layer is disposed on the semiconductor die, and being electrically connected to the semiconductor die. The plurality of conductive balls is disposed between the redistribution layer and the circuit substrate. The semiconductor die is electrically connected to the circuit substrate through the conductive balls. Each of the conductive balls has a ball foot with a first width D1, a ball head with a third width D3 and a ball waist with a second width D2 located between the ball foot and the ball head. The ball foot is connected to the redistribution layer, the ball head is connected to the circuit substrate, and the ball waist is the narrowest portion of each of the conductive balls.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: January 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pi-Lan Chang, Chen-Shien Chen, Chin-Yu Ku, Hsu-Hsien Chen, Wei-Chih Huang, Chun-Ying Lin, Li-Chieh Chou
  • Publication number: 20190252304
    Abstract: A package structure including a circuit substrate, a semiconductor die, a redistribution layer, a plurality of conductive balls and a circuit substrate is provided. The redistribution layer is disposed on the semiconductor die, and being electrically connected to the semiconductor die. The plurality of conductive balls is disposed between the redistribution layer and the circuit substrate. The semiconductor die is electrically connected to the circuit substrate through the conductive balls. Each of the conductive balls has a ball foot with a first width D1, a ball head with a third width D3 and a ball waist with a second width D2 located between the ball foot and the ball head. The ball foot is connected to the redistribution layer, the ball head is connected to the circuit substrate, and the ball waist is the narrowest portion of each of the conductive balls.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 15, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pi-Lan Chang, Chen-Shien Chen, Chin-Yu Ku, Hsu-Hsien Chen, Wei-Chih Huang, Chun-Ying Lin, Li-Chieh Chou
  • Patent number: 10276481
    Abstract: A package structure including a circuit substrate, a semiconductor die, a redistribution layer, a plurality of conductive balls and a circuit substrate is provided. The redistribution layer is disposed on the semiconductor die, and being electrically connected to the semiconductor die. The plurality of conductive balls is disposed between the redistribution layer and the circuit substrate. The semiconductor die is electrically connected to the circuit substrate through the conductive balls. Each of the conductive balls has a ball foot with a first width D1, a ball head with a third width D3 and a ball waist with a second width D2 located between the ball foot and the ball head. The ball foot is connected to the redistribution layer, the ball head is connected to the circuit substrate, and the ball waist is the narrowest portion of each of the conductive balls.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pi-Lan Chang, Chen-Shien Chen, Chin-Yu Ku, Hsu-Hsien Chen, Wei-Chih Huang, Chun-Ying Lin, Li-Chieh Chou
  • Publication number: 20180374785
    Abstract: A package structure including a circuit substrate, a semiconductor die, a redistribution layer, a plurality of conductive balls and a circuit substrate is provided. The redistribution layer is disposed on the semiconductor die, and being electrically connected to the semiconductor die. The plurality of conductive balls is disposed between the redistribution layer and the circuit substrate. The semiconductor die is electrically connected to the circuit substrate through the conductive balls. Each of the conductive balls has a ball foot with a first width D1, a ball head with a third width D3 and a ball waist with a second width D2 located between the ball foot and the ball head. The ball foot is connected to the redistribution layer, the ball head is connected to the circuit substrate, and the ball waist is the narrowest portion of each of the conductive balls.
    Type: Application
    Filed: October 31, 2017
    Publication date: December 27, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pi-Lan Chang, Chen-Shien Chen, Chin-Yu Ku, Hsu-Hsien Chen, Wei-Chih Huang, Chun-Ying Lin, Li-Chieh Chou