Patents by Inventor Li Chiun Hung

Li Chiun Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of reflow soldering for conductive column structure in flip chip package
    Patent number: 9230896
    Abstract: A semiconductor device comprises a substrate and a semiconductor die. Bumps are formed over the substrate or a first surface of the semiconductor die. Conductive columns devoid of solder are formed over the substrate or the first surface of the semiconductor die. The semiconductor die is disposed over the substrate. A collet including a first cavity and a second cavity formed in a surface of the first cavity is mounted over the semiconductor die with a second surface of the semiconductor die opposite the first surface disposed within the first cavity. The bumps are reflowed. A force is applied to the collet to hold the bumps to the conductive columns while reflowing the bumps to make electrical connection to the conductive columns. The collet is removed. An underfill material is deposited between the semiconductor die and substrate. An encapsulant is deposited over the semiconductor die and substrate.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: January 5, 2016
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Chien Chen Lee, Li Chiun Hung
  • Semiconductor Device and Method of Reflow Soldering for Conductive Column Structure in Flip Chip Package
    Publication number: 20130320523
    Abstract: A semiconductor device comprises a substrate and a semiconductor die. Bumps are formed over the substrate or a first surface of the semiconductor die. Conductive columns devoid of solder are formed over the substrate or the first surface of the semiconductor die. The semiconductor die is disposed over the substrate. A collet including a first cavity and a second cavity formed in a surface of the first cavity is mounted over the semiconductor die with a second surface of the semiconductor die opposite the first surface disposed within the first cavity. The bumps are reflowed. A force is applied to the collet to hold the bumps to the conductive columns while reflowing the bumps to make electrical connection to the conductive columns. The collet is removed. An underfill material is deposited between the semiconductor die and substrate. An encapsulant is deposited over the semiconductor die and substrate.
    Type: Application
    Filed: June 5, 2012
    Publication date: December 5, 2013
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Chien Chen Lee, Li Chiun Hung