Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.

Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.

Abstract: A semiconductor device structure includes a source/drain feature comprising a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface. The structure also includes a dielectric layer having a continuous surface in contact with the entire second surface of the source/drain feature, a semiconductor layer having a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface, wherein the sidewall of the semiconductor layer is in contact with the sidewall of the source/drain feature. The structure also includes a gate dielectric layer in contact with the continuous surface of the dielectric layer and the second surface of the semiconductor layer, and a gate electrode layer surrounding a portion of the semiconductor layer.

Abstract: Disclosed herein is a sustained-release formulation that includes, based on the total weight of the sustained-release formulation, 5 wt % to 40 wt % of pregabalin, or a pharmaceutically acceptable salt, solvate or hydrate thereof, 0.1 wt % to 5 wt % of carbomer, and 20 wt % to 60 wt % of polyethylene oxide, wherein the formulation is free from polyvinyl acetate. The formulation can release pregabalin consistently over a time period of 24 hours, and is suitable for once-daily administration.

Abstract: Provided is a method for preparation of a sustained released pharmaceutical composition, wherein an active ingredient and a cellulose derivative dissolved in a lower alkyl alcohol solvent are processed with granulation such that the PEO does not need to be processed with granulation or sizing to achieve uniform drug distribution. Besides, the specific range of the viscosity of the cellulose derivate provides better uniformity to the sustained release pharmaceutical composition derived from the above preparation method.