Abstract: A power converting method for high frequency inverter and low frequency inverter connecting in parallel, which is for converting a direct current power into an alternating current power, includes the following steps. A low frequency inverting module which electrically connected to the direct current power is provided. A high frequency inverting module which is electrically connected to the low frequency inverting module in parallel is provided. A high frequency switching duty ratio of the high frequency inverting module is adjusted to output a second current according to a first current produced by the low frequency inverting module. The second current is for compensating ripples of the first current.

Abstract: A power converting method for high frequency inverter and low frequency inverter connecting in parallel, which is for converting a direct current power into an alternating current power, includes the following steps. A low frequency inverting module which electrically connected to the direct current power is provided. A high frequency inverting module which is electrically connected to the low frequency inverting module in parallel is provided. A high frequency switching duty ratio of the high frequency inverting module is adjusted to output a second current according to a first current produced by the low frequency inverting module. The second current is for compensating ripples of the first current.

Abstract: Current of a three-phase multilevel modular converter (MMC) is controlled. The control is a division-summation (D-?) method yet uses integration to replace the two steps of division and summation. Common D-? characteristic equations are used for all areas. Inductance changes are considered in the characteristic equations. Current source is used to control converter. Therefore, the current of the converter can be traced to sinusoidal reference current even when the inductance changes become big. The modulation method and the capacitor-voltage balancing method are submodule unified pulse width modulation (SUPWM) and sorted voltage-balancing method, respectively. The current control directly obtains a law of the current change on each conducting module of an arm. It does not need complex sector judgments and table look-ups. Thus, the amount of computation and memory for a processor can be relatively reduced.

Abstract: A method is provided for current compensation. The method is based on division-sigma (D-?) control for a DC/DC converter. Inductance changes are allowed with D-? digital control achieved. Loop gain can be quickly adjusted. The disadvantage of average current-mode control (ACMC) is solved, where the disadvantage is a reduction of the response speed caused by the filter within the current loop. The present invention uses midpoint current sampling to ensure taking an average inductor current value in each switching cycle. By doing so, a lack of fidelity of peak current-mode control (PCMC) is solved, where the lack of fidelity is due to the amount of error value between the peak value and the average value. Besides, the present invention uses a table of the inductance following current changes to achieve compensation of duty cycle ratio, where the table is built in a single chip.

Abstract: A method is provided for current compensation. The method is based on division-sigma (D-?) control for a DC/DC converter. Inductance changes are allowed with D-? digital control achieved. Loop gain can be quickly adjusted. The disadvantage of average current-mode control (ACMC) is solved, where the disadvantage is a reduction of the response speed caused by the filter within the current loop. The present invention uses midpoint current sampling to ensure taking an average inductor current value in each switching cycle. By doing so, a lack of fidelity of peak current-mode control (PCMC) is solved, where the lack of fidelity is due to the amount of error value between the peak value and the average value. Besides, the present invention uses a table of the inductance following current changes to achieve compensation of duty cycle ratio, where the table is built in a single chip.

Abstract: An LCL capacitor current compensation and control method based on division and summation technique, comprising following steps: calculating new reference current i*lr=power grid reference current (Igr)+estimated capacitor current (); calculating duty cycle ratio d of respective switches in inverter to obtain inductor current (il), through using corresponding division-and-summation digital control characteristic equation (A), (B), (C), or (D), as based on inverter code of various inverter types; calculating power grid current (ig)=inductor current (il)?capacitor current (ic); calculating voltage across inductor at power grid side (vc?vp)=impedance (Zg) of said inductor at power grid side x power grid current (ig); utilizing equation (4) to calculate voltage across capacitor (vc); estimating capacitor current ()=voltage across said capacitor (vc)/filtering capacitor impedance (Zc); and utilizing equation (3) to estimate capacitor current ().

Abstract: Disclosed is a virtual cluster architecture and method. The virtual cluster architecture includes N virtual clusters, N register files, M sets of function units, a virtual cluster control switch, and an inter-cluster communication mechanism. This invention uses a way of time sharing or time multiplexing to alternatively execute a single program thread across multiple parallel clusters. It minimizes the hardware resources for complicated forwarding circuitry or bypassing mechanism by greatly increasing the tolerance of instruction latency in the datapath. This invention may distribute function units serially into pipeline stages to support composite instructions. The performance and the code sizes of application programs can therefore be significantly improved with these composite instructions, of which the introduced latency can be completely hidden in this invention. This invention also has the advantage of being compatible with the program codes developed on conventional multi-cluster architectures.

Abstract: A reflective rear light for a truck includes a bottom base, a light base, a circuit board, a reflective plate unit and a light lens unit. The circuit board is formed integral, provided with plural LED lights divided into plural indicting sections. Further the LED lights of all the indicating sections are matched with a reflective plate for reflecting light to reinforce the LED lights and to gain better effects.