Abstract: A method includes: identifying a timing path of a logic circuit; determining a Boolean expression at an internal node in the timing path; providing a DC vector having a plurality of forms; determining a Boolean value at the internal node for each of the forms based on the Boolean expression; determining a quantity of stressed transistors in the timing path for each of the forms separately based on the respective Boolean value; and determining a best-case form, associated with an aging effect of the logic circuit, and a worst-case form, associated with the aging effect, out of the forms based on the quantities of stressed transistors.

Abstract: A method performed by at least one processor includes the following steps. A layout of an integrated circuit (IC) is accessed, wherein the layout has at least one cell. A context group for the cell is determined based on a layout context of the cell, wherein the context group is associated with a timing table. A timing analysis is performed on the layout to determine whether the layout complies with a timing constraint rule according to the timing table. A system including one or more processors including instructions for implementing the method and a non-transitory computer readable storage medium including instructions for implementing the method are also provided.

Abstract: A method and system for manufacturing a circuit is disclosed.

Abstract: A method includes: identifying a timing path of a logic circuit; determining a Boolean expression at an internal node in the timing path; providing a DC vector having a plurality of forms; determining a Boolean value at the internal node for each of the forms based on the Boolean expression; determining a quantity of stressed transistors in the timing path for each of the forms separately based on the respective Boolean value; and determining a best-case form, associated with an aging effect of the logic circuit, and a worst-case form, associated with the aging effect, out of the forms based on the quantities of stressed transistors.

Abstract: A cloud radio access network system includes remote signal sources, a baseband processing unit pool, an access management server, a software defined network controller and a network signal forwarder. Each remote signal source is configured to transmit an access signal. The baseband processing unit pool provides a baseband processing signal. The access management server provides an access state signal. Different maximum transmission rates are transmitted via the access state signal. When the baseband processing unit pool has authenticated one remote signal source, the baseband processing unit pool transmits an authentication notification signal to the access management server. Then, the access management server informs the software defined network controller according to the authentication notification signal to increase an upper limit of a signal transmission rate between the baseband processing unit pool and the authenticated remote signal source to a higher one of the maximum transmission rates.

Abstract: A method includes identifying a timing path in a transistor level from a graph diagram; calculating a plurality of aging costs associated with the timing path based on a plurality of forms of a DC vector; identifying a first form, associated with a first aging cost of the aging costs, from the forms; and identifying a second form, associated with a second aging cost less than the first aging cost, from the forms.

Abstract: A method for manufacturing an integrated circuit includes determining a static probability pattern of a circuit cell in a timing path of the integrated circuit; determining a timing delay of the circuit cell along the timing path according to the static probability pattern and a pattern based timing database, wherein the pattern based timing database indicates a plurality of reference delays of each timing arc of the circuit cell characterized in response to a plurality of input stress patterns respectively; and manufacturing the integrated circuit according to the timing delay of the circuit cell along the timing path.

Abstract: A method and system for manufacturing a circuit is disclosed.

Abstract: A cloud radio access network system includes remote signal sources, a baseband processing unit pool, an access management server, a software defined network controller and a network signal forwarder. The software defined network controller is electrically connected to the access management server and the network signal forwarder. The network signal forwarder includes at least two network connectors, each of which is configured to be connected to one remote signal source or the baseband processing unit pool. The software defined network controller obtains connection relation between the network connectors and the remote signal sources or the baseband processing unit pool, and provides network resource information to the network signal forwarder according to the connection relation. The network signal forwarder establishes communication between one remote signal source and the baseband processing unit pool according to the network resource information.

Abstract: A cloud radio access network system includes remote signal sources, a baseband processing unit pool, an access management server, a software defined network controller and a network signal forwarder. Each remote signal source is configured to transmit an access signal. The baseband processing unit pool provides a baseband processing signal. The access management server provides an access state signal. Different maximum transmission rates are transmitted via the access state signal. When the baseband processing unit pool has authenticated one remote signal source, the baseband processing unit pool transmits an authentication notification signal to the access management server. Then, the access management server informs the software defined network controller according to the authentication notification signal to increase an upper limit of a signal transmission rate between the baseband processing unit pool and the authenticated remote signal source to a higher one of the maximum transmission rates.

Abstract: A cloud radio access network system includes remote signal sources, a baseband processing unit pool, an access management server, a software defined network controller and a network signal forwarder. The software defined network controller is electrically connected to the access management server and the network signal forwarder. The network signal forwarder includes at least two network connectors, each of which is configured to be connected to one remote signal source or the baseband processing unit pool. The software defined network controller obtains connection relation between the network connectors and the remote signal sources or the baseband processing unit pool, and provides network resource information to the network signal forwarder according to the connection relation. The network signal forwarder establishes communication between one remote signal source and the baseband processing unit pool according to the network resource information.

Abstract: A cloud radio access network system includes remote signal sources, a baseband processing unit pool, an access management server, a software defined network controller and a network signal forwarder. Each remote signal source is configured to transmit an access signal. The baseband processing unit pool provides a baseband processing signal. The access management server provides an access state signal. The software defined network controller is electrically connected to the access management server and the network signal forwarder. The remote signal sources and the baseband processing unit pool are electrically connected to the network signal forwarder so that the access signal and the baseband processing signal are transmitted through the network signal forwarder. Signal transmission between the software defined network controller and the access management server are independent of the at least one network signal forwarder.

Abstract: A method for manufacturing an integrated circuit includes determining a static probability pattern of a circuit cell in a timing path of the integrated circuit; determining a timing delay of the circuit cell along the timing path according to the static probability pattern and a pattern based timing database, wherein the pattern based timing database indicates a plurality of reference delays of each timing arc of the circuit cell characterized in response to a plurality of input stress patterns respectively; and manufacturing the integrated circuit according to the timing delay of the circuit cell along the timing path.

Abstract: A method includes generating a first timing library for a first set of circuit elements for a first set of input parameters. Generating the first timing library includes determining device characteristics for each of the circuit elements in the first set of circuit elements and storing the determined device characteristics in a database. A second timing library is generated for a second set of circuit elements for a second set of input parameters. The second timing library is generated by using one or more of the determined device characteristics previously stored in the database. A circuit is formed on a substrate. The circuit includes at least one of the first set of circuit elements or the second set of circuit elements.

Abstract: A method includes identifying a timing path in a transistor level from a graph diagram; calculating a plurality of aging costs associated with the timing path based on a plurality of forms of a DC vector; identifying a first form, associated with a first aging cost of the aging costs, from the forms; and identifying a second form, associated with a second aging cost less than the first aging cost, from the forms.

Abstract: A method for establishing an aging model of a device is provided. The device is measured to obtain degradation information of the device under an operating condition, wherein the device is a physical device. The degradation information is partitioned into a permanent degradation portion and an impermanent degradation portion. The impermanent degradation portion is differentiated by time to obtain a differential value. The aging model is obtained according to the differential value. When the differential value is greater than zero, a degradation of the device increases over time, and when the differential value is less than zero, the degradation of the device decreases over time.

Abstract: A method for establishing an aging model of a device is provided. The device is measured to obtain degradation information of the device under an operating condition, wherein the device is a physical device. The degradation information is partitioned into a permanent degradation portion and an impermanent degradation portion. The impermanent degradation portion is differentiated by time to obtain a differential value. The aging model is obtained according to the differential value. When the differential value is greater than zero, a degradation of the device increases over time, and when the differential value is less than zero, the degradation of the device decreases over time.

Abstract: A method performed by a processor, the method including preparing a netlist describing a first circuit including an active component; obtaining an original electrical characteristic of the active component, wherein an electrical characteristic of the active component is the original electrical characteristic in a condition that the active component has not been operated; obtaining an aged data describing a variation in the original electrical characteristic, wherein the variation is caused by operating the first circuit under a first mode and a second mode different from the first mode during a time period; providing a simulation result by simulating, based on an aged electrical characteristic, the first circuit operating under the first mode and the second mode during the time period, wherein the aged electrical characteristic is a combination of the original electrical characteristic and the variation.

Abstract: A method includes generating a first timing library for a first set of circuit elements for a first set of input parameters. Generating the first timing library includes determining device characteristics for each of the circuit elements in the first set of circuit elements and storing the determined device characteristics in a database. A second timing library is generated for a second set of circuit elements for a second set of input parameters. The second timing library is generated by using one or more of the determined device characteristics previously stored in the database. A circuit is formed on a substrate. The circuit includes at least one of the first set of circuit elements or the second set of circuit elements.

Abstract: A method performed by a processor, the method including preparing a netlist describing a first circuit including an active component, obtaining an original electrical characteristic of the active component, wherein an electrical characteristic of the active component is the original electrical characteristic in a condition that the active component has not been operated; obtaining an aged data describing a variation in the original electrical characteristic, wherein the variation is caused by operating the first circuit under a first mode and a second mode different from the first mode during a time period; providing a simulation result by simulating, based on an aged electrical characteristic, the first circuit operating under the first mode and the second mode during the time period, wherein the aged electrical characteristic is a combination of the original electrical characteristic and the variation.