Abstract: A flyback power converter includes a primary side controller circuit for controlling a primary side switch; and a secondary side controller circuit for generating an SR (Synchronous Rectification) signal to control an SR switch. The SR signal includes an SR pulse and a ZVS (Zero Voltage Switching) pulse. The SR pulse controls the SR switch for synchronous rectification at the secondary side. The secondary side controller circuit samples and holds a voltage at a first end of the SR switch as a first voltage at a timing between the end of the ZVS pulse and the beginning of the SR pulse, and determines a length of the ZVS pulse so as to control the SR switch to be conductive for a ZVS time period, whereby the primary side switch achieves ZVS. The first voltage is proportional to an input voltage.

Abstract: A switching controller circuit for controlling a flyback power converter includes: a power transformer, a primary side controller circuit and a secondary side controller circuit. The power transformer is coupled between the input voltage and the output voltage in an isolated manner. The primary side controller circuit controls a primary side switch of the flyback power converter. The secondary side controller circuit generates a synchronous rectification (SR) signal, to control an SR switch of the flyback power converter. The SR signal includes an SR pulse and a soft switching (SS) pulse. The SR pulse controls the SR switch to be ON for an SR period, to achieve synchronous rectification at the secondary side. The SS pulse controls the SR switch to be ON for an SS period, to achieve soft switching of the primary side switch.

Abstract: A switching controller circuit for controlling a flyback power converter includes: a power transformer, a primary side controller circuit and a secondary side controller circuit. The power transformer is coupled between the input voltage and the output voltage in an isolated manner. The primary side controller circuit controls a primary side switch of the flyback power converter. The secondary side controller circuit generates a synchronous rectification (SR) signal, to control an SR switch of the flyback power converter. The SR signal includes an SR pulse and a soft switching (SS) pulse. The SR pulse controls the SR switch to be ON for an SR period, to achieve synchronous rectification at the secondary side. The SS pulse controls the SR switch to be ON for an SS period, to achieve soft switching of the primary side switch.

Abstract: A flyback power converter includes a primary side controller circuit for controlling a primary side switch; and a secondary side controller circuit for generating an SR (Synchronous Rectification) signal to control an SR switch. The SR signal includes an SR pulse and a ZVS (Zero Voltage Switching) pulse. The SR pulse controls the SR switch for synchronous rectification at the secondary side. The secondary side controller circuit samples and holds a voltage at a first end of the SR switch as a first voltage at a timing between the end of the ZVS pulse and the beginning of the SR pulse, and determines a length of the ZVS pulse so as to control the SR switch to be conductive for a ZVS time period, whereby the primary side switch achieves ZVS. The first voltage is proportional to an input voltage.

Abstract: A ZVS (zero voltage switching) control circuit for controlling a flyback power converter includes: a primary side controller circuit for generating a switching signal, to control a primary side switch; and a secondary side controller circuit for generating a synchronous rectifier (SR) control signal for controlling a synchronous rectifier switch. The SR control signal includes an SR-control pulse and a ZVS pulse. The SR-control pulse controls the synchronous rectifier switch to perform secondary side synchronous rectification. The secondary side controller circuit determines a trigger timing point of the ZVS pulse according to a waveform characteristic of a ringing signal, to control the synchronous rectifier switch to be ON for a predetermined period, thereby achieving zero voltage switching of the primary side switch. The primary side or the secondary side controller circuit includes a jitter controller for performing jitter control on the ZVS pulse.

Abstract: Whether a synchronous signal includes a synchronous pulse is determined by detecting whether there is a positive pulse higher than a positive threshold followed by a negative pulse lower than a negative threshold. The pulse signal detection method includes: comparing the synchronous signal with the positive threshold; comparing the synchronous signal with the negative threshold; and determining that the synchronous pulse exists when the positive pulse of the synchronous signal is higher than the positive threshold and the negative pulse of the synchronous signal is lower than the negative threshold in a post detection period after the positive pulse of the synchronous signal is determined higher than the positive threshold.

Abstract: A ZVS (zero voltage switching) control circuit for controlling a flyback power converter includes: a primary side controller circuit for generating a switching signal, to control a primary side switch; and a secondary side controller circuit for generating a synchronous rectifier (SR) control signal for controlling a synchronous rectifier switch. The SR control signal includes an SR-control pulse and a ZVS pulse. The SR-control pulse controls the synchronous rectifier switch to perform secondary side synchronous rectification. The secondary side controller circuit determines a trigger timing point of the ZVS pulse according to a waveform characteristic of a ringing signal, to control the synchronous rectifier switch to be ON for a predetermined period, thereby achieving zero voltage switching of the primary side switch. The primary side or the secondary side controller circuit includes a jitter controller for performing jitter control on the ZVS pulse.

Abstract: Whether a synchronous signal includes a synchronous pulse is determined by detecting whether there is a positive pulse higher than a positive threshold followed by a negative pulse lower than a negative threshold. The pulse signal detection method includes: comparing the synchronous signal with the positive threshold; comparing the synchronous signal with the negative threshold; and determining that the synchronous pulse exists when the positive pulse of the synchronous signal is higher than the positive threshold and the negative pulse of the synchronous signal is lower than the negative threshold in a post detection period after the positive pulse of the synchronous signal is determined higher than the positive threshold.

Abstract: A switching regulator includes: a controller power ON reset (POR) circuit, a controller post-POR signal generation circuit, and a pulse width modulation (PWM) signal generation circuit. The controller post-POR signal generation circuit switches the controller post-POR signal to a ready level after a controller pre-POR signal is switched to a controller reset-accomplished level and a driver signal starts switching levels to operate a power switch. The PWM signal generation circuit sets a duty ratio of a PWM signal to a predetermined minimum duty ratio after the controller pre-POR signal is switched to the controller reset-accomplished level and before the controller post-POR signal is switched to a ready level.

Abstract: A switching regulator includes: a controller power ON reset (POR) circuit, a controller post-POR signal generation circuit, and a pulse width modulation (PWM) signal generation circuit. The controller post-POR signal generation circuit switches the controller post-POR signal to a ready level after a controller pre-POR signal is switched to a controller reset-accomplished level and a driver signal starts switching levels to operate a power switch. The PWM signal generation circuit sets a duty ratio of a PWM signal to a predetermined minimum duty ratio after the controller pre-POR signal is switched to the controller reset-accomplished level and before the controller post-POR signal is switched to a ready level.

Abstract: The present invention discloses a power stage control circuit including: a driver circuit for controlling a power stage according to an error amplified signal; an error amplifier circuit for comparing a feedback voltage at a feedback terminal with a reference signal to generate the error amplified signal; a current generator circuit coupled to the feedback terminal for generating a fault detection current flowing to the feedback terminal; and a feedback terminal short detection circuit for generating a fault signal to stop the operation of the power stage when the feedback voltage is smaller than a short-circuit threshold voltage or when the fault detection current is larger than a short-circuit threshold current.

Abstract: The present invention discloses a power stage control circuit including: a driver circuit for controlling a power stage according to an error amplified signal; an error amplifier circuit for comparing a feedback voltage at a feedback terminal with a reference signal to generate the error amplified signal; a current generator circuit coupled to the feedback terminal for generating a fault detection current flowing to the feedback terminal; and a feedback terminal short detection circuit for generating a fault signal to stop the operation of the power stage when the feedback voltage is smaller than a short-circuit threshold voltage or when the fault detection current is larger than a short-circuit threshold current.