Abstract: A method for insulating metal conductors by spin-on-glass in inter-metal dielectric layers and devices formed by such method are disclosed. In the method, an additional step of scrubber clean is incorporated after an etch-back process on the spin-on-glass layer is conducted. Contaminating metal ions such as those of calcium is thus removed to eliminate formation of voids by such particles. The method can be easily implemented by including the additional scrubber clean step into a total wafer fabrication recipe.

Abstract: A chemical mechanical polishing apparatus for semiconductor wafers that ensures uniform planarization of said wafers is described. Said chemical mechanical polishing apparatus comprises a slurry supply system that channels slurry through the platen and pad, and a carrier head with provision to hold the wafer. The pad contains grooves for uniform distribution of the slurry under the rotating wafer thus eliminating uneven planarization as in prior art.

Abstract: A method for forming upon a semiconductor substrate a void free titanium nitride Anti-Reflective Coating (ARC) layer upon an aluminum containing conductor layer. There is first formed upon a semiconductor substrate an aluminum containing conductor layer. There is then formed upon the aluminum containing conductor layer a titanium rich titanium nitride layer which has a titanium:nitrogen molar ratio of greater than about 1.1:1. Finally, there is formed upon the titanium rich titanium nitride layer a substantially stoichiometric titanium nitride layer which has a titanium:nitrogen molar ratio of from about 1.0:1 to about 1.1:1. Optionally, a patterned photo resist layer may be formed upon the surface of the substantially stoichiometric titanium nitride layer and the substantially stoichiometric titanium nitride layer, the titanium rich titanium nitride layer and the aluminum containing conductor layer may be sequentially patterned.