Patents by Inventor Li-Fan LIN

Li-Fan LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240030338
    Abstract: A semiconductor device includes an active layer having first and second active regions, first and second source electrodes, first and second drain electrodes, first and second gate electrodes, a first source metal layer, first and second drain metal layers, and a source pad electrically connected to the first source metal layer. The second drain metal layer is electrically connected to the second drain electrode and the first source metal layer. A projection of the second drain metal layer on the active layer forms a drain metal layer region. An projection of the source pad on the active layer forms a source pad region. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Application
    Filed: October 6, 2023
    Publication date: January 25, 2024
    Inventors: Li-Fan LIN, Chun-Chieh YANG, Ying-Chen LIU
  • Patent number: 11817494
    Abstract: A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: November 14, 2023
    Assignee: ANCORA SEMICONDUCTORS INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang, Ying-Chen Liu
  • Publication number: 20210098617
    Abstract: A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Application
    Filed: December 14, 2020
    Publication date: April 1, 2021
    Inventors: Li-Fan LIN, Chun-Chieh YANG, Ying-Chen LIU
  • Patent number: 10950524
    Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, and a first drain pad. The source electrode, the drain electrode, and the gate electrode are disposed on an active region of the active layer. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The first source pad and the first drain pad are disposed on the first insulating layer and the active region. The first source pad includes a first source body and a first source branch. The first source branch is electrically connected to the first source body and disposed on the source electrode. The first drain pad includes a first drain body and a first drain branch. The first drain branch is electrically connected to the first drain body and disposed on the drain electrode.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 16, 2021
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang
  • Patent number: 10910491
    Abstract: A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: February 2, 2021
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang, Ying-Chen Liu
  • Patent number: 10665709
    Abstract: A semiconductor device includes a substrate, a power device, a protection circuit, a dielectric layer, a drain pad, a source pad, and a gate pad. The power device and the protection circuit are disposed on the substrate. The power device includes a drain electrode, a source electrode, and a gate electrode. The protection circuit has a first terminal electrically connected with the source pad and a second terminal electrically connected with the gate pad. The dielectric layer is disposed on the power device and the protection circuit. The drain pad, the source pad, and the gate pad are disposed on the dielectric layer and respectively electrically connected with the drain electrode, the source electrode, and the gate electrode. At least part of the protection circuit is disposed under the source pad, the gate pad, or the drain pad.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: May 26, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Po-Chin Peng
  • Patent number: 10573736
    Abstract: A semiconductor device including an active layer made of III-V group semiconductors, a source electrode and a drain electrode disposed on the active layer, a gate electrode disposed on or above the active layer and between the source electrode and the drain electrode, an interlayer dielectric covering the source electrode, the drain electrode, and the gate electrode and having a plurality of inter-gate via holes. The semiconductor device further includes an inter-source layer, an inter-drain layer, and an inter-gate layer disposed on the interlayer dielectric. The semiconductor device further includes an inter-gate plug filled in the inter-gate via hole and electrically connected to the gate electrode and the inter-gate layer, and a gate field plate being separated from the gate electrode and electrically connected to the gate electrode through the inter-gate layer.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: February 25, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang, Wen-Chia Liao, Ching-Chuan Shiue, Shih-Peng Chen
  • Publication number: 20200020791
    Abstract: A semiconductor device including an active layer made of III-V group semiconductors, a source electrode and a drain electrode disposed on the active layer, a gate electrode disposed on or above the active layer and between the source electrode and the drain electrode, an interlayer dielectric covering the source electrode, the drain electrode, and the gate electrode and having a plurality of inter-gate via holes. The semiconductor device further includes an inter-source layer, an inter-drain layer, and an inter-gate layer disposed on the interlayer dielectric. The semiconductor device further includes an inter-gate plug filled in the inter-gate via hole and electrically connected to the gate electrode and the inter-gate layer, and a gate field plate being separated from the gate electrode and electrically connected to the gate electrode through the inter-gate layer.
    Type: Application
    Filed: September 25, 2019
    Publication date: January 16, 2020
    Inventors: Li-Fan LIN, Chun-Chieh YANG, Wen-Chia LIAO, Ching-Chuan SHIUE, Shih-Peng CHEN
  • Publication number: 20190386128
    Abstract: A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Application
    Filed: August 26, 2019
    Publication date: December 19, 2019
    Inventors: Li-Fan LIN, Chun-Chieh YANG, Ying-Chen LIU
  • Patent number: 10468516
    Abstract: A semiconductor device including an active layer made of III-V group semiconductors, a source electrode and a drain electrode disposed on the active layer, a gate electrode disposed on or above the active layer and between the source electrode and the drain electrode, an interlayer dielectric covering the source electrode, the drain electrode, and the gate electrode and having a plurality of inter-gate via holes. The semiconductor device further includes an inter-source layer, an inter-drain layer, and an inter-gate layer disposed on the interlayer dielectric. The semiconductor device further includes an inter-gate plug filled in the inter-gate via hole and electrically connected to the gate electrode and the inter-gate layer, and a gate field plate being separated from the gate electrode and electrically connected to the gate electrode through the inter-gate layer.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: November 5, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang, Wen-Chia Liao, Ching-Chuan Shiue, Shih-Peng Chen
  • Publication number: 20190189764
    Abstract: A semiconductor device includes an active layer, source electrodes, drain electrodes, gate electrodes, an insulating layer, gate metal layers, source metal layers, and drain metal layers. The source electrodes, drain electrodes, and gate electrodes are over the active layer, in which each of the gate electrodes includes a plurality of narrow portions and wider portions alternately arranged, and the wider portions of one of the gate electrodes extend toward the source electrode and directly connected to the wider portions of another one of the gate electrodes. The insulating layer is over the source electrodes, the drain electrodes, and the gate electrodes. The gate metal layers are over the gate electrodes and the insulating layer. The source metal layers are over the source electrodes and the insulating layer. The drain metal layers are over the drain electrodes and the insulating layer.
    Type: Application
    Filed: February 14, 2019
    Publication date: June 20, 2019
    Inventors: Li-Fan LIN, Chun-Chieh YANG
  • Publication number: 20190131214
    Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, and a first drain pad. The source electrode, the drain electrode, and the gate electrode are disposed on an active region of the active layer. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The first source pad and the first drain pad are disposed on the first insulating layer and the active region. The first source pad includes a first source body and a first source branch. The first source branch is electrically connected to the first source body and disposed on the source electrode. The first drain pad includes a first drain body and a first drain branch. The first drain branch is electrically connected to the first drain body and disposed on the drain electrode.
    Type: Application
    Filed: December 27, 2018
    Publication date: May 2, 2019
    Inventors: Li-Fan LIN, Chun-Chieh YANG
  • Patent number: 10249725
    Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a gate metal layer, a via, a first source metal layer, a drain metal layer, and a second source metal layer. The source electrode, the drain electrode, and the gate electrode are present on the active layer. The first insulating layer is present on the source electrode, the drain electrode, and the gate electrode. The gate metal layer, the first source metal layer, the second source metal layer, and the drain metal layer are present on the first insulating layer. The gate metal layer includes a narrow portion and a wider portion. The via is present between the metal gate layer and the gate electrode. The second source metal layer is present between the gate metal layer and the drain metal layer.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: April 2, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang
  • Patent number: 10236236
    Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, and a first drain pad. The source electrode, the drain electrode, and the gate electrode are disposed, on an active region of the active layer. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The first source pad and the first drain pad are disposed on the first insulating layer and the active region. The first source pad includes a first source body and a first source branch. The first source branch is electrically connected to the first source body and disposed on the source electrode. The first drain pad includes a first drain body and a first drain branch. The first drain branch is electrically connected to the first drain body and disposed on the drain electrode.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: March 19, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang
  • Publication number: 20190006504
    Abstract: A semiconductor device including an active layer made of III-V group semiconductors, a source electrode and a drain electrode disposed on the active layer, a gate electrode disposed on or above the active layer and between the source electrode and the drain electrode, an interlayer dielectric covering the source electrode, the drain electrode, and the gate electrode and having a plurality of inter-gate via holes. The semiconductor device further includes an inter-source layer, an inter-drain layer, and an inter-gate layer disposed on the interlayer dielectric. The semiconductor device further includes an inter-gate plug filled in the inter-gate via hole and electrically connected to the gate electrode and the inter-gate layer, and a gate field plate being separated from the gate electrode and electrically connected to the gate electrode through the inter-gate layer.
    Type: Application
    Filed: July 23, 2018
    Publication date: January 3, 2019
    Inventors: Li-Fan LIN, Chun-Chieh YANG, Wen-Chia LIAO, Ching-Chuan SHIUE, Shih-Peng CHEN
  • Patent number: 10084076
    Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, an interlayer dielectric, an inter-source layer, an inter-source plug, an inter-drain layer, an inter-drain plug, an inter-gate layer, and an inter-gate plug. The active layer is made of III-V group semiconductors. The source electrode, the drain electrode, and the gate electrode are disposed on the active layer. The gate electrode is disposed between the source electrode and the drain electrode. The interlayer dielectric covers the source electrode, the drain electrode, and the gate electrode. The inter-source layer, the inter-drain layer, and the inter-gate layer are disposed on the interlayer dielectric. The inter-source plug is electrically connected to the source electrode and the inter-source layer. The inter-drain plug is electrically connected to the drain electrode and the inter-drain layer. The inter-gate plug is electrically connected to the gate electrode and the inter-gate layer.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: September 25, 2018
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang, Wen-Chia Liao, Ching-Chuan Shiue, Shih-Peng Chen
  • Publication number: 20180047822
    Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a gate metal layer, a via, a first source metal layer, a drain metal layer, and a second source metal layer. The source electrode, the drain electrode, and the gate electrode are present on the active layer. The first insulating layer is present on the source electrode, the drain electrode, and the gate electrode. The gate metal layer, the first source metal layer, the second source metal layer, and the drain metal layer are present on the first insulating layer. The gate metal layer includes a narrow portion and a wider portion. The via is present between the metal gate layer and the gate electrode. The second source metal layer is present between the gate metal layer and the drain metal layer.
    Type: Application
    Filed: August 15, 2016
    Publication date: February 15, 2018
    Inventors: Li-Fan LIN, Chun-Chieh YANG
  • Patent number: 9893015
    Abstract: A semiconductor device includes an element layer, plural source electrodes, plural drain electrodes, plural gate electrodes, a source bus bar, a drain bus bar, a first gate bus bar, and a second gate bus bar. The source electrodes, the drain electrodes, and the gate electrodes are disposed on the element layer and extend along a first direction. The gate electrodes are respectively disposed between the source and drain electrodes. The source and drain bus bars and the first and second gate bus bars extend along a second direction interlaced with the first direction. The source bus bar and the drain bus bar are electrically connected to the source electrodes and the drain electrodes, respectively. The first and second gate bus bars are connected to the gate electrodes. The first bus bar is disposed at one end of the source electrodes. The source electrode crosses the second gate bus bar.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: February 13, 2018
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang
  • Publication number: 20170194477
    Abstract: A semiconductor device includes a substrate, a power device, a protection circuit, a dielectric layer, a drain pad, a source pad, and a gate pad. The power device and the protection circuit are disposed on the substrate. The power device includes a drain electrode, a source electrode, and a gate electrode. The protection circuit has a first terminal electrically connected with the source pad and a second terminal electrically connected with the gate pad. The dielectric layer is disposed on the power device and the protection circuit. The drain pad, the source pad, and the gate pad are disposed on the dielectric layer and respectively electrically connected with the drain electrode, the source electrode, and the gate electrode. At least part of the protection circuit is disposed under the source pad, the gate pad, or the drain pad.
    Type: Application
    Filed: March 24, 2017
    Publication date: July 6, 2017
    Inventors: Li-Fan LIN, Po-Chin PENG
  • Publication number: 20170154839
    Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, and a first drain pad. The source electrode, the drain electrode, and the gate electrode are disposed, on an active region of the active layer. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The first source pad and the first drain pad are disposed on the first insulating layer and the active region. The first source pad includes a first source body and a first source branch. The first source branch is electrically connected to the first source body and disposed on the source electrode. The first drain pad includes a first drain body and a first drain branch. The first drain branch is electrically connected to the first drain body and disposed on the drain electrode.
    Type: Application
    Filed: February 10, 2017
    Publication date: June 1, 2017
    Inventors: Li-Fan LIN, Chun-Chieh YANG