Patents by Inventor Li-Fang Lin

Li-Fang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087980
    Abstract: A semiconductor device includes a substrate, a dielectric layer disposed over the substrate, and an interconnect structure extending through the dielectric layer. The dielectric layer includes a low-k dielectric material which includes silicon carbonitride having a carbon content ranging from about 30 atomic % to about 45 atomic %. The semiconductor device further includes a thermal dissipation feature extending through the dielectric layer and disposed to be spaced apart from the interconnect structure.
    Type: Application
    Filed: February 17, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kai-Fang CHENG, Cherng-Shiaw TSAI, Cheng-Chin LEE, Yen-Ju WU, Yen-Pin HSU, Li-Ling SU, Ming-Hsien LIN, Hsiao-Kang CHANG
  • Patent number: 11916131
    Abstract: According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: De-Fang Chen, Teng-Chun Tsai, Cheng-Tung Lin, Li-Ting Wang, Chun-Hung Lee, Ming-Ching Chang, Huan-Just Lin
  • Publication number: 20170271251
    Abstract: A semiconductor substrate is disclosed. The semiconductor substrate includes a substrate body having at least an opening formed on a surface thereof, wherein the surface of the substrate body and a wall of the opening are made of an insulating material; and a circuit layer formed on the surface of the substrate body, wherein the circuit layer covers an end of the opening and is electrically insulated from the opening. The opening facilitates to increase the thickness of the insulating structure between the circuit layer and the substrate body of a silicon material to prevent signal degradation when high frequency signals are applied to the circuit layer.
    Type: Application
    Filed: June 2, 2017
    Publication date: September 21, 2017
    Inventors: Bo-Shiang Fang, Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang, Li-Fang Lin
  • Patent number: 9698090
    Abstract: A semiconductor substrate is disclosed. The semiconductor substrate includes a substrate body having at least an opening formed on a surface thereof, wherein the surface of the substrate body and a wall of the opening are made of an insulating material; and a circuit layer formed on the surface of the substrate body, wherein the circuit layer covers an end of the opening and is electrically insulated from the opening. The opening facilitates to increase the thickness of the insulating structure between the circuit layer and the substrate body of a silicon material to prevent signal degradation when high frequency signals are applied to the circuit layer.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: July 4, 2017
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Bo-Shiang Fang, Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang, Li-Fang Lin
  • Patent number: 9281557
    Abstract: A multi bandwidth balun is provided, including a main signal port, a main inductor electrically connected to the main signal port, a first inductor inducted mutually with the main inductor to constitute a first inductor of a first conversion circuit, a first capacitor module connected in parallel to the first conversion circuit, two first signal ports electrically connected to the first capacitor module, a first main capacitor electrically connected to the first signal port and the first capacitor module therebetween, a second inductor inducted mutually with the main inductor to constitute a second inductor of a second conversion circuit, a second capacitor module connected in parallel to the second conversion circuit, two second signal ports electrically connected to the second capacitor module, and a second main capacitor electrically connected to the second signal port and the second capacitor module therebetween.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: March 8, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chia-Chu Lai, Min-Han Chuang, Bo-Shiang Fang, Ho-Chuan Lin, Li-Fang Lin
  • Publication number: 20150188510
    Abstract: A circuit structure is provided, which includes: a first circuit portion having at least a capacitor; a first dielectric portion combined with the first circuit portion; a second circuit portion electrically connected to the first circuit portion and having at least an inductor; and a second dielectric portion combined with the second circuit portion, wherein the first dielectric portion has a greater dielectric constant than the second dielectric portion, thereby increasing the capacitance value and density and causing the inductor to have a high enough Q value.
    Type: Application
    Filed: March 14, 2014
    Publication date: July 2, 2015
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang, Li-Fang Lin, Ming-Fan Tsai
  • Patent number: 9054670
    Abstract: A cross-coupled bandpass filter includes first, second and third resonators such that a positive mutual inductance is generated between the first and third resonators and mutual inductance generated between the first and second resonators and mutual inductance generated between the second and third resonators have the same polarity, thereby generating a transmission zero in a high frequency rejection band.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: June 9, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Min-Han Chuang, Chia-Chu Lai, Bo-Shiang Fang, Ho-Chuan Lin, Li-Fang Lin
  • Publication number: 20140320374
    Abstract: A multi bandwidth balun is provided, including a main signal port, a main inductor electrically connected to the main signal port, a first inductor inducted mutually with the main inductor to constitute a first inductor of a first conversion circuit, a first capacitor module connected in parallel to the first conversion circuit, two first signal ports electrically connected to the first capacitor module, a first main capacitor electrically connected to the first signal port and the first capacitor module therebetween, a second inductor inducted mutually with the main inductor to constitute a second inductor of a second conversion circuit, a second capacitor module connected in parallel to the second conversion circuit, two second signal ports electrically connected to the second capacitor module, and a second main capacitor electrically connected to the second signal port and the second capacitor module therebetween.
    Type: Application
    Filed: November 26, 2013
    Publication date: October 30, 2014
    Applicant: Siliconware Precision Industries Co., Ltd
    Inventors: Chia-Chu Lai, Min-Han Chuang, Bo-Shiang Fang, Ho-Chuan Lin, Li-Fang Lin
  • Patent number: 8736059
    Abstract: An interconnecting mechanism is provide, which includes paired first sub-interconnecting mechanisms and paired second sub-interconnecting mechanisms. The first pair of sub-interconnecting mechanisms includes first and second axially symmetrical spiral conductive elements. The second pair of sub-interconnecting mechanisms includes third and fourth axially symmetrical spiral conductive elements. Configuring the pairs of sub-interconnecting mechanisms in a differential transmission structure having a spiral shape is used to avert sounds and noise signals between different chips or substrates caused by a miniaturizing fabrication process or an increased wiring density.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: May 27, 2014
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Ming-Fan Tsai, Hsin-Hung Lee, Bo-Shiang Fang, Li-Fang Lin
  • Publication number: 20140124950
    Abstract: A semiconductor substrate is disclosed. The semiconductor substrate includes a substrate body having at least an opening formed on a surface thereof, wherein the surface of the substrate body and a wall of the opening are made of an insulating material; and a circuit layer formed on the surface of the substrate body, wherein the circuit layer covers an end of the opening and is electrically insulated from the opening. The opening facilitates to increase the thickness of the insulating structure between the circuit layer and the substrate body of a silicon material to prevent signal degradation when high frequency signals are applied to the circuit layer.
    Type: Application
    Filed: January 30, 2013
    Publication date: May 8, 2014
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Bo-Shiang Fang, Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang, Li-Fang Lin
  • Publication number: 20130141187
    Abstract: A cross-coupled bandpass filter includes first, second and third resonators such that a positive mutual inductance is generated between the first and third resonators and mutual inductance generated between the first and second resonators and mutual inductance generated between the second and third resonators have the same polarity, thereby generating a transmission zero in a high frequency rejection band.
    Type: Application
    Filed: August 17, 2012
    Publication date: June 6, 2013
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Min-Han Chuang, Chia-Chu Lai, Bo-Shiang Fang, Ho-Chuan Lin, Li-Fang Lin
  • Publication number: 20130034971
    Abstract: An interconnecting mechanism is provide, which includes paired first sub-interconnecting mechanisms and paired second sub-interconnecting mechanisms. The first pair of sub-interconnecting mechanisms includes first and second axially symmetrical spiral conductive elements. The second pair of sub-interconnecting mechanisms includes third and fourth axially symmetrical spiral conductive elements. Configuring the pairs of sub-interconnecting mechanisms in a differential transmission structure having a spiral shape is used to avert sounds and noise signals between different chips or substrates caused by a miniaturizing fabrication process or an increased wiring density.
    Type: Application
    Filed: November 29, 2011
    Publication date: February 7, 2013
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ming-Fan Tsai, Hsin-Hung Lee, Bo-Shiang Fang, Li-Fang Lin